InnoMemory LLC v. Kleberg Bank National Association

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: Kleberg Bank, National Association (Texas)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 4:25-cv-00436, S.D. Tex., 02/02/2025
• Venue Allegations: Venue is alleged to be proper because the Defendant maintains an established place of business within the Southern District of Texas.
• Core Dispute: Plaintiff alleges that Defendant’s internal use of certain products containing memory devices infringes a patent related to reducing power consumption during memory refresh operations.
• Technical Context: The technology concerns methods for selectively powering down and refreshing portions of a computer's memory (DRAM) to conserve energy, a feature particularly relevant in mobile and other power-sensitive computing environments.
• Key Procedural History: The patent-in-suit is a continuation of a prior application that issued as U.S. Patent No. 6,618,314, which may be relevant for establishing the effective filing date and understanding the prosecution history.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - "Method and architecture for reducing the power consumption for memory devices in refresh operations"

The Invention Explained

• Problem Addressed: The patent describes a problem with conventional dynamic random access memories (DRAMs), which must periodically refresh all memory cells to prevent data loss. In standby or low-power modes, this refresh process consumes significant power, even if only a small portion of the memory holds critical data. Conventional methods often activate the support circuitry for the entire memory array during a refresh cycle, which is inefficient and drains power, a particular drawback for battery-powered devices (e.g., portable telephones). ('960 Patent, col. 1:15-56).
• The Patented Solution: The invention proposes a method and architecture where the memory array is divided into multiple sections (e.g., quadrants). A control circuit can selectively perform "background operations," such as refreshing, on one or more of these sections while leaving the support circuits for the other sections inactive. This is achieved by using control signals, generated in response to a programmable address signal, to enable or disable the "periphery array circuits" for each section independently. ('960 Patent, Abstract; col. 2:35-56; Fig. 3). By only activating the circuitry for the memory sections that require refreshing, overall power consumption in standby mode is reduced. ('960 Patent, col. 8:15-20).
• Technical Importance: This approach allows for a more granular control of power usage in memory systems, directly addressing the demand for longer standby times in the growing market for mobile and portable electronic devices. ('960 Patent, col. 1:33-38).

Key Claims at a Glance

• The complaint asserts infringement of one or more "Exemplary '960 Patent Claims" without identifying specific claims (Compl. ¶11). Independent claim 1 is a representative method claim.
• Independent Claim 1:
  • A method for reducing power consumption during background operations in a memory array with a plurality of sections, comprising the steps of:
  • controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals,
  • wherein said one or more control signals are generated in response to a programmable address signal,
  • and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section; and
  • presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections.
• The complaint does not explicitly reserve the right to assert dependent claims but refers generally to "one or more claims." (Compl. ¶11).

III. The Accused Instrumentality

Product Identification

The complaint does not name specific products. It refers to "Exemplary Defendant Products" that are identified in charts within an "Exhibit 2" that was not publicly filed with the complaint. (Compl. ¶11, ¶13).

Functionality and Market Context

The complaint alleges that Defendant directly infringes by, among other things, "having its employees internally test and use these Exemplary Products." (Compl. ¶12). Based on the patent's subject matter, these products are likely computer systems, servers, or other electronic devices used in the Defendant's banking operations that contain memory devices (e.g., DRAM modules). The complaint does not provide further detail on the specific functionality or market context of the accused products.

No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint incorporates its infringement allegations by referencing claim charts in an "Exhibit 2," which was not provided with the filed complaint. (Compl. ¶13-14). The complaint's narrative infringement theory is conclusory, stating that "the Exemplary Defendant Products practice the technology claimed by the '960 Patent" and "satisfy all elements of the Exemplary '960 Patent Claims." (Compl. ¶13).

Without the claim charts or more specific factual allegations, a detailed analysis of the infringement theory is not possible. The complaint does not provide sufficient detail for analysis of how the accused products are alleged to meet any specific claim limitations.

V. Key Claim Terms for Construction

Based on an analysis of representative independent claim 1, the construction of the following terms may be central to resolving the dispute.

"background operations"

• Context and Importance: This term defines the scope of activities to which the power-saving method applies. The patent explicitly identifies "refresh operations" and "parity checking" as examples. ('960 Patent, col. 8:20-24; Claim 2; Claim 4). The dispute may turn on whether the accused devices perform other types of low-power memory management that could be argued to fall within the scope of "background operations."
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The use of "such as" when introducing refresh operations suggests the term is not limited to that specific function. ('960 Patent, col. 2:48-49). The claim language is open, referring generally to "background operations." ('960 Patent, col. 8:40).
  • Evidence for a Narrower Interpretation: The patent's title, abstract, and background are heavily focused on "refresh operations." A party could argue that the term should be construed as limited to periodic, data-retention activities like refreshing, as opposed to any operation that occurs in the background. ('960 Patent, Title; Abstract; col. 1:15-18).

"programmable address signal"

• Context and Importance: The generation of control signals is tied to this "programmable" signal, which appears to dictate which sections of memory are refreshed. Practitioners may focus on this term because infringement will hinge on whether the accused systems, likely containing standard off-the-shelf memory controllers, utilize a signal that meets this "programmable" limitation.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification suggests this can be "information (e.g., a block address) stored in a refresh address register." ('960 Patent, col. 8:3-5). This could be interpreted broadly to cover any register-based mechanism for selecting a memory region.
  • Evidence for a Narrower Interpretation: Claim 1 requires the control signals to be "generated in response to a programmable address signal." ('960 Patent, col. 8:45-46). This could be read to require a specific input signal that is actively programmed for this purpose, not merely a static configuration setting in a standard memory controller. Figure 3 shows a "refresh address register" (138) that receives a "refresh block address" (AR1) upon a "LOAD" signal, suggesting a specific programming step. ('960 Patent, Fig. 3).

"periphery array circuits"

• Context and Importance: The invention's power-saving benefit comes from deactivating these specific circuits. Infringement requires identifying these structures in the accused devices and proving they are selectively controlled as claimed.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification states these circuits are for accessing memory cells and can be disabled for sections not being refreshed. ('960 Patent, col. 3:24-33). Claim 5 further defines them as including "sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits." ('960 Patent, col. 8:62 - col. 9:4). This list could be argued to be illustrative rather than exhaustive.
  • Evidence for a Narrower Interpretation: A defendant might argue that to infringe, an accused device must have distinct circuits corresponding to those listed in Claim 5 and shown in Figure 5 (e.g., wordline driver 160, equalization circuit 162, sense amplifiers 164), and that they must be controlled for each memory section independently. ('960 Patent, Fig. 5).

VI. Other Allegations

• Indirect Infringement: The complaint makes no specific factual allegations to support a claim for indirect infringement (either induced or contributory).
• Willful Infringement: The complaint does not allege pre- or post-suit knowledge of the patent or any egregious conduct that would typically form the basis of a willfulness claim. The prayer for relief requests that the case be declared "exceptional" under 35 U.S.C. § 285, but the complaint body provides no supporting facts for this request. (Compl. ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

1. Evidentiary Sufficiency: A threshold issue is whether the Plaintiff's infringement contentions, once revealed, can connect the high-level theory of the patent to the concrete operation of the "Exemplary Defendant Products." Given that the defendant is a bank, these are likely standard commercial computer systems, and the key evidentiary question will be whether these off-the-shelf products can be shown to practice the specific, granular control of "periphery array circuits" required by the claims.
2. Definitional Scope: The case may turn on claim construction, particularly the meaning of "programmable address signal." The court will need to determine if this requires a specific, user-directed programming action to select memory sections for low-power refresh, or if the term can be construed more broadly to read on the automated, built-in power management features of modern memory controllers.
3. The "Background Operations" Limitation: A central question will be one of functional scope: does the accused functionality in the Defendant's systems constitute "background operations" as contemplated by the patent? The analysis will likely focus on whether the accused power-saving modes are functionally equivalent to the "refresh operations" and "parity checking" described in the specification, or if they represent a distinct and non-infringing technology.