DCT
1:23-cv-01036
Eridanus Tech Inc v. Advanced Micro Devices Inc
Key Events
Complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Eridanus Technologies, Inc. (Delaware)
- Defendant: Advanced Micro Devices, Inc. (Delaware)
- Plaintiff’s Counsel: Nelson Bumgardner Conroy PC
- Case Identification: 1:23-cv-01036, W.D. Tex., 09/01/2023
- Venue Allegations: Plaintiff alleges venue is proper because Defendant has a regular and established place of business in the district, specifically its Austin office, and has committed acts of infringement in the district.
- Core Dispute: Plaintiff alleges that Defendant’s processor products, including its Ryzen and EPYC series CPUs and APUs, infringe two patents related to managing power consumption and reducing current leakage in semiconductor devices.
- Technical Context: The technology concerns power management within complex Systems-on-Chip (SoCs), a critical field for improving the energy efficiency and thermal performance of modern microprocessors.
- Key Procedural History: The complaint alleges that Plaintiff provided Defendant with claim charts detailing the alleged infringement at least as early as May 2021, a fact which may be material to the allegations of willful infringement.
Case Timeline
| Date | Event |
|---|---|
| 2004-08-11 | '764 Patent Priority Date |
| 2006-02-03 | '623 Patent Priority Date |
| 2008-05-13 | '764 Patent Issue Date |
| 2010-03-02 | '623 Patent Issue Date |
| 2021-05-01 | Alleged Pre-Suit Notice of Infringement to Defendant |
| 2023-09-01 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,372,764 - "Logic device with reduced leakage current," Issued May 13, 2008
The Invention Explained
- Problem Addressed: As semiconductor manufacturing processes shrink device sizes, leakage current becomes a significant source of power consumption, especially at high operating temperatures. This leakage can degrade performance and system reliability (’764 Patent, col. 1:15-21, col. 2:1-3).
- The Patented Solution: The invention describes a circuit architecture to reduce this leakage. It uses "voltage controlled constriction devices" to create "virtual" supply and ground planes that are decoupled from the main power supply during standby modes. These constriction devices, biased by specific reference voltages, limit current flow and effectively raise the ground voltage and lower the supply voltage for the logic array, thereby reducing the voltage potential across transistors and curtailing leakage current (’764 Patent, Abstract; col. 2:49-59; Fig. 4).
- Technical Importance: This approach sought to provide a method for leakage reduction that was more area-efficient and stable across temperature variations than prior art solutions, such as simple gated-ground switches or fixed diode clamps (’764 Patent, col. 2:3-11).
Key Claims at a Glance
- The complaint asserts independent claim 1 and dependent claims 2 and 3 (Compl. ¶23).
- Independent Claim 1 requires:
- An array of logic devices;
- A switch connected between each supply terminal and each virtual supply terminal of the logic devices for sourcing/sinking current;
- Voltage controlled constriction devices connected between the supply terminals and virtual supply terminals;
- The voltage controlled constriction devices are biased by reference voltages between less than a supply voltage and more than a ground voltage to reduce leakage current in an area efficient manner.
- The complaint reserves the right to assert additional claims (Compl. ¶23, n.1).
U.S. Patent No. 7,671,623 - "Device for managing the consumption peak of a domain on each powering-up," Issued March 2, 2010
The Invention Explained
- Problem Addressed: When a section (or "domain") of a System-on-Chip (SoC) is powered on, it can draw a large, sudden spike of current to charge its internal capacitance. This "inrush current" can cause a voltage drop on the global power grid, potentially disrupting the operation of other active domains on the same chip (’623 Patent, col. 1:24-30, col. 5:55-62).
- The Patented Solution: The patent discloses a two-stage power-up sequence to manage this inrush current. First, a "pre-charge transistor," acting as a limited current source, slowly charges the domain. Second, the main "power switch" is activated using a command signal with a controlled "slew-rate" (rate of voltage change). This controlled delay ensures the main switch turns on only after the domain is substantially charged, preventing a large current spike (’623 Patent, Abstract; col. 7:44-53).
- Technical Importance: This technique provides a controlled method for activating power domains within an SoC, enhancing overall system stability by mitigating the disruptive effects of power-up current surges (’623 Patent, col. 1:49-54).
Key Claims at a Glance
- The complaint asserts independent claim 1 and dependent claims 2, 3, 5, and 6 (Compl. ¶38).
- Independent Claim 1 requires:
- A System-On-Chip (SOC) system with a plurality of domains and a global power supply grid;
- Each domain is selectively supplied by a local power supply grid connected to the global grid via a power switch commanded by a control circuit;
- At least one pre-charge transistor connected in parallel with the power switch;
- The control circuit is configured to generate an analog command signal whose slew-rate is controlled.
- The complaint reserves the right to assert additional claims (Compl. ¶38).
III. The Accused Instrumentality
Product Identification
The complaint identifies numerous AMD processor families as the Accused Products, including but not limited to Ryzen 1000, 2000, and 3000 Series CPUs and APUs; Ryzen Threadripper and Embedded CPUs; and EPYC server CPUs that employ "on die LDO regulation" (Compl. ¶21, ¶36).
Functionality and Market Context
The complaint alleges that the accused processors are complex SoCs that incorporate multiple processing cores and logic blocks ("domains"). These products allegedly use on-die Low-Dropout (LDO) regulators to manage power distribution to these various domains (Compl. ¶21, ¶39). The complaint alleges these LDO regulators perform the functions of the claimed inventions, such as reducing leakage current and managing power-up current peaks (Compl. ¶¶25-27, 39-42). These processors represent a significant portion of AMD's business in the consumer, enthusiast, and data center markets. The complaint includes an annotated die shot of an accused product showing a "Core Complex (CCX)" which it alleges is the claimed "array of logic devices" (Compl. ¶25).
IV. Analysis of Infringement Allegations
’764 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| an array of logic devices | The accused products' core complex (CCX), which includes L2 and L3 caches. An annotated die photograph is provided as evidence. | ¶25 | col. 2:50-51 |
| a switch connected between each supply terminal and each virtual supply terminal of said logic devices for sourcing/sinking current to/from said logic devices | LDO Regulators located in a lower bank of the processor die constitute the switch. An annotated die photograph and circuit diagram are provided. | ¶26 | col. 2:51-54 |
| voltage controlled constriction devices connected between said supply terminals and said virtual supply terminals, said voltage controlled constriction devices being biased by reference voltages between less than a supply voltage and more than a ground voltage to reduce the leakage current in an area efficient manner | The LDO regulators also function as the voltage controlled constriction devices, which are biased by reference voltages to reduce leakage. Annotated circuit diagrams are provided. | ¶27 | col. 2:54-59 |
- Identified Points of Contention:
- Scope Questions: Claim 1 recites a "switch" and "voltage controlled constriction devices" as separate limitations. The complaint alleges that the accused LDO regulators meet both limitations. The infringement analysis may turn on whether these terms must refer to structurally distinct components, as certain figures in the patent might suggest (e.g., Fig. 6), or if they can describe different functions of a single, integrated circuit like an LDO.
- Technical Questions: The complaint's theory that an LDO regulator functions as both a switch and a constriction device relies on its annotations of circuit diagrams (Compl. ¶¶26-27). A key question will be whether the actual operation of the accused LDOs corresponds to the specific biasing and current-limiting functions required by the claim.
’623 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a System-On-Chip (SOC) system which includes a plurality of domains and a global power supply grid, each domain being selectively supplied by a local power supply grid connected to the global supply grid via a power switch commanded by a control circuit integrated in a control-command device | The accused processors are SOCs with multiple domains, a global power supply grid, and LDO regulators that function as the power switch and control-command device. An annotated die shot is provided. | ¶¶39-40 | col. 7:10-21 |
| at least one pre-charge transistor connected in parallel with the power switch between the global supply grid and the local power supply grid | A transistor within the accused LDO circuitry, identified in an annotated circuit diagram, is alleged to be the claimed pre-charge transistor connected in parallel with the power switch. | ¶41 | col. 8:3-5 |
| wherein the control circuit for the power switch is configured to generate an analog command signal whose slew-rate is controlled | The control circuitry for the power switch, identified in an annotated circuit diagram, allegedly generates an analog command signal with a controlled slew-rate to delay the turn-on of the power switch. | ¶42 | col. 8:6-8 |
- Identified Points of Contention:
- Scope Questions: Does the accused LDO regulator circuitry contain a component that functions as a "pre-charge transistor" in the manner claimed? The dispute may focus on whether this term requires a dedicated component for pre-charging, or if a transistor that is part of the LDO's standard regulation or feedback loop can satisfy the limitation.
- Technical Questions: The complaint's infringement theory relies on identifying distinct functional blocks (power switch, pre-charge transistor, control circuit) within the complex circuitry of an LDO regulator, as shown in an annotated diagram (Compl. ¶41). A central question is whether this interpretation accurately reflects the technical operation of the accused device, or if the identified components serve different purposes than those alleged.
V. Key Claim Terms for Construction
’764 Patent
- The Term: "voltage controlled constriction devices"
- Context and Importance: This term is central to the novelty of the '764 patent. Its construction will determine whether a complex circuit like an LDO regulator can be considered a "constriction device," or if the term is limited to simpler components.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification describes the function as providing an "active constriction realized with a diode or saturated small transistor working as a constant source" (’764 Patent, col. 4:49-52). Plaintiff may argue this is an exemplary, not an exclusive, definition, and any device that provides a voltage-controlled current limit meets the functional requirements.
- Evidence for a Narrower Interpretation: The patent consistently illustrates the constriction devices as single, small PMOS or NMOS transistors (e.g., M52, M54 in Fig. 5; M62, M64 in Fig. 6). Defendant may argue the term should be limited to these simple transistor structures, not a multi-stage LDO regulator.
’623 Patent
- The Term: "pre-charge transistor"
- Context and Importance: The infringement allegation for the ’623 patent hinges on finding this parallel "pre-charge transistor" within the accused LDOs. How this structural term is defined is therefore critical.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent describes the function as comprising "one or more transistors in saturation mounted in parallel" to "deliver a determined maximum intensity" of current (’623 Patent, col. 7:25-30). Plaintiff could argue that any transistor within the LDO that performs this initial current-delivery function, regardless of its other roles, meets the definition.
- Evidence for a Narrower Interpretation: The patent describes the "pre-charge mechanism" as a distinct functional element from the "power switch" (’623 Patent, col. 7:4-13). Defendant may argue that this implies a structurally separate component dedicated to pre-charging, not an integrated part of a standard LDO's start-up or regulation sequence.
VI. Other Allegations
- Indirect Infringement: The complaint alleges that AMD induces infringement by providing customers and partners with "instructions, user manuals, advertising, and/or marketing materials," "technical documentation," and "tools" that instruct on the use of the accused processors in a manner that infringes the patents (Compl. ¶¶28, 43, citing a URL for technical documents at ¶13, n.2).
- Willful Infringement: The complaint alleges willful infringement based on pre-suit knowledge. It explicitly states that "At least as of May 2021, ETI presented AMD with charts detailing its infringement of the Asserted Patents" (Compl. ¶15). The complaint alleges that AMD continued its infringing conduct despite this notice (Compl. ¶¶30, 45).
VII. Analyst’s Conclusion: Key Questions for the Case
- A central issue will be one of technical mapping: can the discrete functional elements recited in the patent claims—such as a "switch" and a separate "constriction device" ('764 patent), or a "power switch" with a parallel "pre-charge transistor" ('623 patent)—be found within the integrated and multi-functional LDO regulators of the accused AMD processors? The resolution will depend on whether the court views the claims as requiring distinct structures or merely functional roles.
- The case will also turn on claim construction: how the court defines terms like "voltage controlled constriction devices" and "pre-charge transistor" will be pivotal. Whether these terms are limited to the simple transistor embodiments shown in the patents or can be construed more broadly to encompass the complex operations of a modern LDO regulator will likely determine the outcome of the infringement analysis.
- A key factual question for the willfulness claim will be the substance of the alleged May 2021 notice. The court will examine the content of the infringement charts provided to AMD and AMD's subsequent conduct to determine if the alleged continued infringement was objectively reckless.