DCT

1:24-cv-00129

ImberaTek LLC v. Apple Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 1:24-cv-00129, W.D. Tex., 04/26/2024
  • Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Apple maintains a regular and established place of business in the district, including corporate offices and retail stores, employs engineers relevant to the accused technology there, and has committed alleged acts of infringement within the district.
  • Core Dispute: Plaintiff alleges that Defendant’s A Series and M Series System-on-Chip (SoC) processors infringe nine patents related to advanced semiconductor packaging and manufacturing solutions.
  • Technical Context: The technology concerns methods and structures for embedding semiconductor components directly into an installation base, such as a circuit board or package substrate, to create more compact, reliable, and cost-effective electronic modules.
  • Key Procedural History: The complaint alleges that Plaintiff provided Defendant with notice of infringement via letters and emails on multiple occasions prior to the lawsuit, beginning on February 3, 2020. These notices identified most of the patents-in-suit and accused products, forming the basis for allegations of willful infringement.

Case Timeline

Date Event
2002-01-31 Priority Date for ’909, ’944, and ’201 Patents
2003-02-26 Priority Date for ’527 and ’207 Patents
2003-04-01 Priority Date for ’723 Patent
2003-09-18 Priority Date for ’816 Patent
2008-05-12 Priority Date for ’324 Patent
2009-10-27 ’527 Patent Issued
2010-06-08 ’909 Patent Issued
2010-07-23 Priority Date for ’113 Patent
2011-08-02 ’944 Patent Issued
2012-07-17 ’723 Patent Issued
2012-08-07 ’113 Patent Issued
2013-02-05 ’201 Patent Issued
2015-08-11 ’324 Patent Issued
2020-02-03 Plaintiff sends first notice letter to Defendant
2021-07-20 ’207 Patent Issued
2021-10-28 Plaintiff sends subsequent notice to Defendant
2021-11-04 Plaintiff sends subsequent notice to Defendant
2022-05-13 Plaintiff sends notice regarding the ’207 Patent to Defendant
2023-08-01 ’816 Patent Issued
2024-04-26 First Amended Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,609,527 - "Electronic module," issued October 27, 2009

The Invention Explained

  • Problem Addressed: The patent describes the technical challenge of connecting unpackaged semiconductor components directly to a circuit board ('527 Patent, col. 2:14-17). Conventional methods like flip-chip (FC) technology suffer from reliability issues caused by mechanical and thermal stress between the component and the board, while other embedding techniques face difficulties in precisely aligning the electrical connections ('527 Patent, col. 2:18-40).
  • The Patented Solution: The invention proposes embedding a component within an installation base, such as a circuit board, and creating electrical connections through a conductor layer that covers the installation cavity ('527 Patent, col. 3:12-24). By placing the component's contact zones towards this conductor layer and forming connections before patterning the conductors, the invention aims to create a more reliable and compact module without the need for traditional feed-throughs that require difficult alignment ('527 Patent, Abstract).
  • Technical Importance: This approach enables the creation of smaller, more mechanically durable, and potentially less expensive electronic modules by integrating components directly into the substrate structure (Compl. ¶24).

Key Claims at a Glance

  • The complaint asserts at least independent claim 1 (Compl. ¶58).
  • Claim 1 recites an electronic module comprising:
    • A first conductive-pattern layer with first solid contact bumps solderlessly made on its surface.
    • A component with flat contact zones and second solid contact bumps solderlessly made on those zones.
    • An insulating-material layer on the first conductive-pattern layer, in which the component is embedded.
    • The second solid contact bumps on the component are metallurgically, electrically, and solderlessly connected to the first solid contact bumps on the conductive-pattern layer.
  • The complaint states it accuses "one or more claims" of the patent, reserving the right to assert others (Compl. ¶58).

U.S. Patent No. 7,732,909 - "Method for embedding a component in a base," issued June 8, 2010

The Invention Explained

  • Problem Addressed: The patent addresses the need for a reliable and economical method to embed unpackaged semiconductor components into an installation base to create more robust and compact electronic devices ('909 Patent, col. 1:12-19). Prior art methods are described as complex, costly, and facing challenges with connection reliability and manufacturing precision ('909 Patent, col. 1:49-2:50).
  • The Patented Solution: The invention discloses a method where through-holes are made in a base structure. A polymer film is then spread over one surface of the base, covering the holes ('909 Patent, Abstract). A component is placed into a hole from the opposite side and pressed against the polymer film, causing it to adhere. This process is intended to precisely position the component for subsequent manufacturing steps, such as forming electrical connections ('909 Patent, col. 2:51-64).
  • Technical Importance: The method provides a structured process for integrating components within a substrate, which helped enable the manufacturing of smaller, less expensive, and more reliable circuit boards and electronic modules (Compl. ¶24).

Key Claims at a Glance

  • The complaint asserts at least independent claim 12 (Compl. ¶66).
  • Claim 12 recites a circuit board comprising:
    • An insulating material layer that includes a baseboard and a hardened insulating polymer layer.
    • Conductive patterns on both sides of the insulating material layer.
    • At least one microcircuit inside the insulating layer in a hole in the baseboard, with its first surface against the hardened polymer layer.
    • Conductive material on the sidewalls of the hole, intended to create interference protection around the microcircuit.
    • Contact openings in the hardened polymer layer containing copper for forming electrical contacts.
  • The complaint states it accuses "one or more claims" of the patent, reserving the right to assert others (Compl. ¶66).

U.S. Patent No. 7,989,944 - "Method for embedding a component in a base," issued August 2, 2011

  • Technology Synopsis: This patent, like the ’909 Patent, is directed to a method for embedding semiconductor components in a base, such as a circuit board, during its manufacture ('944 Patent, Abstract). The process involves creating through-holes in a base, applying a polymer film over one side, placing components into the holes from the opposite side, and pressing them against the film to adhere them in place for subsequent processing ('944 Patent, col. 2:52-65).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. ¶74).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to be manufactured by and embody the claimed invention (Compl. ¶74).

U.S. Patent No. 8,222,723 - "Electric module having a conductive pattern layer," issued July 17, 2012

  • Technology Synopsis: This patent describes the structure of an electronic module where a component is attached to a conductive layer via an adhesive ('723 Patent, Abstract). The component is surrounded by an insulating material layer, and electrical connections are formed through the adhesive layer, connecting the component's contact zones to the conductive layer ('723 Patent, Abstract).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. ¶82).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to embody the claimed module structure (Compl. ¶82).

U.S. Patent No. 8,238,113 - "Electronic module with vertical connector between conductor patterns," issued August 7, 2012

  • Technology Synopsis: This patent is directed to an electronic module with a "conductive trace structure" that provides vertical electrical connections between wiring layers on opposite sides of a dielectric substrate ('113 Patent, col. 2:6-14). The invention aims to improve the aspect ratio and density of these vertical interconnects compared to conventional through-holes, enabling more complex routing in a smaller footprint ('113 Patent, col. 2:36-44).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. ¶90).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to contain the claimed vertical connector structures (Compl. ¶90).

U.S. Patent No. 8,368,201 - "Method for embedding a component in a base," issued February 5, 2013

  • Technology Synopsis: This patent discloses a method for embedding semiconductor components in a base structure like a circuit board ('201 Patent, Abstract). The method involves forming through-holes, applying a polymer film, placing the component into the hole against the film, and then forming conductive patterns that align with the embedded component ('201 Patent, col. 2:52-16).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. p. 30, ¶2).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to be made by and embody the claimed invention (Compl. p. 30, ¶2).

U.S. Patent No. 9,107,324 - "Circuit module and method of manufacturing the same," issued August 11, 2015

  • Technology Synopsis: This patent relates to a circuit module with a "bumpless" component, where the contact areas of the component contain a different metal than the conductors ('324 Patent, col. 1:14-24). The invention uses an intermediate layer containing a third metal to form a reliable contact element between the component and the conductors, addressing material compatibility issues in advanced packaging ('324 Patent, col. 3:9-25).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. p. 33, ¶10).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to contain the claimed bumpless interconnect structures (Compl. p. 33, ¶10).

U.S. Patent No. 11,071,207 - "Electronic Module," issued July 20, 2021

  • Technology Synopsis: This patent describes an electronic module where one or more components are embedded in an installation base ('207 Patent, Abstract). The structure includes multiple conductive layers and insulating layers, with specific arrangements of contact bumps made of different materials to form the electrical connections between a component and the conductive layers ('207 Patent, col. 13:25-45, Claim 1).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. p. 36, ¶18).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to embody the claimed module structure (Compl. p. 36, ¶18).

U.S. Patent No. 11,716,816 - "Method for manufacturing an electronic module and electronic module," issued August 1, 2023

  • Technology Synopsis: This patent discloses an electronic module and its manufacturing method, featuring an embedded conductive pattern located between first and second insulating material layers ('816 Patent, Abstract). A component is placed in an opening in the first insulating layer and electrically coupled to a first conductive pattern layer, with the embedded pattern providing additional routing capabilities ('816 Patent, Abstract).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. p. 38, ¶26).
  • Accused Features: The accused features are Apple's SoCs, which are alleged to be made by and embody the claimed invention (Compl. p. 38, ¶26).

III. The Accused Instrumentality

Product Identification

  • The accused products are Defendant's "A Series and M Series chips," which are identified as Systems-on-Chip (SoCs) (Compl. ¶4). The complaint provides a non-limiting list of specific accused SoCs, from the A12 to the A17 Pro and the M1 to the M3 Max processors (Compl. ¶46). The complaint also accuses the end-user electronic devices that incorporate these SoCs, such as iPhones, iPads, MacBooks, and the Vision Pro (Compl. ¶47).

Functionality and Market Context

  • The complaint alleges that the accused SoCs are "semiconductor device package[s] comprising multiple semiconductor components that are arranged on top of each other with insulating materials between them, and that are connected to each other with conducting materials" (Compl. ¶58). This description points to a 3D or stacked-die packaging architecture, a key technology for increasing performance and integration in a small footprint. The complaint alleges these SoCs are foundational components in Defendant's highest-volume and most significant products, and notes Defendant's position as the largest supplier of smartphones in the United States (Compl. ¶¶ 8, 47).

IV. Analysis of Infringement Allegations

The complaint references, but does not include, claim chart exhibits detailing its infringement theories. The narrative infringement theory is summarized below.

  • ’527 Patent Infringement Allegations: The complaint alleges that Defendant’s SoCs, exemplified by the Apple M1 processor, meet every limitation of at least claim 1 of the ’527 Patent (Compl. ¶59). The core of the allegation is that the physical construction of the accused SoCs—with their stacked semiconductor components, insulating materials, and conductive interconnects—embodies the claimed electronic module structure (Compl. ¶¶ 58-59).
  • ’909 Patent Infringement Allegations: The complaint alleges that the same accused SoCs, again exemplified by the Apple M1 processor, meet every limitation of at least claim 12 of the ’909 Patent (Compl. ¶67). The infringement theory asserts that the structure of the accused SoC packages, which function as substrates for multiple components, corresponds to the claimed "circuit board" with an embedded microcircuit and specific conductive features (Compl. ¶¶ 66-67).
  • Identified Points of Contention:
    • Scope Questions: A primary issue may be definitional. For the ’909 Patent, a question is whether a modern semiconductor package, or SoC, constitutes a "circuit board" as that term is understood within the context of the patent's specification, which dates to the early 2000s. Similarly, for the ’527 Patent, it will be questioned whether the interconnects within Apple's SoCs can be accurately described by the specific claim terms "first solid contact bumps" and "second solid contact bumps."
    • Technical Questions: The infringement analysis will likely require a detailed technical comparison. For the ’527 Patent, a central question is what evidence supports the allegation that the interconnects in the accused SoCs are "solderlessly made" and feature the specific "bump-on-bump" structure recited in claim 1. For the ’909 Patent, a key technical question is what evidence shows that structures within the accused SoCs function as a "conductive material on sidewalls of the hole" for the specific purpose of "interference protection," as required by claim 12.

No probative visual evidence provided in complaint.

V. Key Claim Terms for Construction

  • For the ’527 Patent:

    • The Term: "solderlessly made"
    • Context and Importance: This term appears in claim 1 to describe the connection between the contact bumps. Its construction is critical because modern SoCs use advanced bonding techniques (e.g., thermo-compression bonding, hybrid bonding) that differ from traditional soldering. Practitioners may focus on this term because the case may turn on whether these modern techniques fall within the patent's definition of "solderless."
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification contrasts the invention with soldering, stating "Soldering is not needed in the connections of the components" ('527 Patent, col. 4:16-17). This could support a broad construction that includes any connection method not involving traditional solder reflow.
      • Evidence for a Narrower Interpretation: The specification provides specific examples of solderless methods, such as "ultrasonic welding" and "thermo-compression" ('527 Patent, col. 4:21-22). This could support a narrower construction limited to these disclosed techniques or those that are technologically equivalent.

  • For the ’909 Patent:

    • The Term: "circuit board"
    • Context and Importance: Asserted claim 12 is for a "circuit board." The accused instrumentalities are semiconductor SoC packages. Practitioners may focus on this term because its scope will determine whether the claim can read on the accused technology at all.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification of the parent '527 patent, incorporated by reference, states that the "installation base" can be a "circuit board" or "some other base, for example, a base used in the packaging of a component or components" ('527 Patent, col. 1:44-49). This suggests the term was contemplated to be broad enough to cover package substrates.
      • Evidence for a Narrower Interpretation: The ’909 Patent specification frequently describes the base in terms of conventional printed circuit board materials, such as a "glass-fibre reinforced epoxy sheet, such as an FR4-type board" ('909 Patent, col. 7:42-43). This could support an argument that the term is limited to traditional PCBs and not advanced semiconductor packages.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges both contributory and induced infringement for each asserted patent. The contributory infringement claim is based on the allegation that Defendant's SoCs are a material part of the patented inventions, are specially made for use in an infringing manner, and are not staple articles of commerce (e.g., Compl. ¶¶ 60-61). The inducement claim is based on Defendant’s alleged knowledge of the patents from pre-suit notice letters and its continued sale of products that allegedly infringe (e.g., Compl. ¶62).
  • Willful Infringement: Willfulness is alleged for the ’527, ’909, ’944, ’723, ’113, ’201, ’324, and ’207 patents based on alleged pre-suit knowledge stemming from notice letters beginning in February 2020 (Compl. ¶¶ 51-54). For the ’816 Patent, willfulness is alleged based on knowledge obtained from the filing of the complaint itself (Compl. p. 40, ¶30).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of definitional scope: can the term "circuit board," as defined in patents from the early 2000s and rooted in PCB manufacturing, be construed to cover the highly integrated, multi-component System-on-Chip (SoC) packages that are central to modern mobile computing?
  • A key evidentiary question will be one of technical mapping: does the physical micro-architecture of the interconnects within Apple’s SoCs—which may involve technologies like thermo-compression or hybrid bonding—literally correspond to the specific structural limitations recited in the claims, such as a "solderlessly made" "bump-on-bump" connection or sidewall conductors for "interference protection"?
  • A third central question will concern damages and willfulness: given the allegations of pre-suit notice dating back over four years for most of the asserted patents, the dispute over whether any infringement was willful and the appropriate measure of damages will likely be a significant focus of the litigation.