DCT

1:24-cv-00229

InnoMemory LLC v. Fidelity Bank Of Texas

Key Events
Complaint
complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: InnoMemory, LLC v. Fidelity Bank of Texas, 1:24-cv-00229, W.D. Tex., 03/04/2024
  • Venue Allegations: Venue is alleged to be proper as Defendant maintains an established place of business in the Western District of Texas.
  • Core Dispute: Plaintiff alleges that Defendant’s unspecified products, which incorporate memory devices, infringe two patents related to power consumption and data access efficiency in random access memory (RAM) circuits.
  • Technical Context: The patents address fundamental challenges in computer memory design: optimizing power usage during data retrieval and refresh cycles, which is critical for all computing devices, from servers to portable electronics.
  • Key Procedural History: The complaint does not mention any prior litigation, inter partes review proceedings, or licensing history related to the patents-in-suit.

Case Timeline

Date Event
1999-02-13 ’046 Patent Priority Date
2001-05-29 ’046 Patent Issue Date
2002-03-04 ’960 Patent Priority Date
2006-06-06 ’960 Patent Issue Date
2024-03-04 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,240,046

  • Patent Identification: U.S. Patent No. 6,240,046, "Integrated circuit random access memory capable of reading either one or more than one data word in a single clock cycle," issued May 29, 2001.
  • The Invention Explained:
    • Problem Addressed: The patent’s background section describes a power-efficiency dilemma in memory design. For sequential "burst" read requests, retrieving multiple data words at once is power-efficient because it requires fewer memory array accesses. However, for random read requests where only one data word is needed, retrieving multiple words wastes power by discarding the unrequested data. The patent notes an "unfilled need for memory devices with low power consumption characteristics" that can operate efficiently in both scenarios (’046 Patent, col. 2:11-15).
    • The Patented Solution: The invention is a memory integrated circuit that can dynamically adapt its data retrieval strategy to save power (’046 Patent, Abstract). It proposes a memory architecture with a data bus wider than one data word that can operate in two states. In a first state, it retrieves only a single data word from the memory array per clock cycle, optimizing for random reads. In a second state, it retrieves more than one data word per clock cycle, optimizing for burst reads by pre-fetching subsequent data words (’046 Patent, col. 2:45-56). This dual-mode capability is controlled by circuitry, such as a flip-flop, that can switch states based on the nature of the read requests (’046 Patent, col. 2:45-46).
    • Technical Importance: This technology offered a method to optimize power consumption in memory subsystems based on real-time access patterns, a key consideration for the growing market of portable, battery-powered computing systems (’046 Patent, col. 2:11-13).
  • Key Claims at a Glance:
    • The complaint does not identify specific asserted claims, incorporating them by reference to an unattached exhibit (Compl. ¶14). As such, an analysis of asserted claims is not possible based on the provided documents.

U.S. Patent No. 7,057,960

  • Patent Identification: U.S. Patent No. 7,057,960, "Method and architecture for reducing the power consumption for memory devices in refresh operations," issued June 6, 2006.
  • The Invention Explained:
    • Problem Addressed: The patent’s background explains that dynamic random access memory (DRAM) cells require periodic refreshing to maintain their data. In conventional architectures, a refresh operation activates the support circuitry (periphery array circuits) for all sections of the memory array simultaneously, even when only a portion of the array is being refreshed. This process consumes significant power, particularly in standby mode where refresh is a primary source of power drain (’960 Patent, col. 1:44-57).
    • The Patented Solution: The invention discloses a method for reducing power consumption by sectionalizing the refresh process (’960 Patent, Abstract). The memory array is divided into multiple sections (e.g., quadrants), and the control circuitry is designed to activate the periphery array circuits for only the specific section(s) undergoing a refresh operation. The circuits for all other sections remain inactive, thereby saving power (’960 Patent, col. 2:25-31). This is implemented through control signals that selectively enable the support circuits for the targeted section(s) (’960 Patent, Fig. 3).
    • Technical Importance: By localizing power consumption to only the necessary portions of the memory array during background refresh operations, this architecture directly addresses the need for lower standby power in battery-dependent electronic devices (’960 Patent, col. 1:30-34).
  • Key Claims at a Glance:
    • The complaint does not identify specific asserted claims, incorporating them by reference to an unattached exhibit (Compl. ¶20). As such, an analysis of asserted claims is not possible based on the provided documents.

III. The Accused Instrumentality

  • Product Identification: The complaint does not identify any specific accused products by name, model, or function. It refers generally to "Defendant products identified in the charts" as the "Exemplary Defendant Products" (Compl. ¶12, ¶18).
  • Functionality and Market Context: The complaint does not provide sufficient detail for analysis of the accused instrumentality's functionality. It alleges that Defendant, a bank, has infringed by "making, using, offering to sell, selling and/or importing" the accused products, and by having its employees "internally test and use" them (Compl. ¶12-13, ¶18-19). This suggests the accused products could be standard computer hardware, such as servers, networking equipment, or workstations, used in the course of Defendant's business operations. No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint alleges direct infringement and incorporates by reference Exhibits 3 and 4, which it describes as claim charts comparing the exemplary patent claims to the accused products (Compl. ¶14, ¶20). As these exhibits were not attached to the filed complaint provided for analysis, a detailed examination of the specific infringement allegations is not possible. The complaint asserts in a conclusory manner that the "Exemplary Defendant Products" practice the claimed technology and satisfy all elements of the asserted claims (Compl. ¶14, ¶20).

The complaint does not provide sufficient detail for analysis of infringement allegations, including a claim chart summary or identified points of contention.

V. Key Claim Terms for Construction

As the complaint does not identify the specific claims asserted from the patents-in-suit, an analysis of key claim terms for construction is not feasible based on the provided documents.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges only "Direct Infringement" and does not plead facts to support claims of induced or contributory infringement (Compl. ¶12, ¶18).
  • Willful Infringement: The complaint does not contain an explicit allegation of willful infringement or plead facts suggesting pre-suit knowledge of the patents-in-suit. The prayer for relief requests a finding that the case is "exceptional" to support an award of attorneys' fees under 35 U.S.C. § 285, but does not explicitly request enhanced damages for willfulness under 35 U.S.C. § 284 (Compl. ¶G.G.i).

VII. Analyst’s Conclusion: Key Questions for the Case

The complaint as filed provides minimal detail, deferring substantive allegations to unattached exhibits. Consequently, the initial phase of the case will likely focus on procedural matters and discovery before the core technical disputes can be framed. The central questions raised by the filing are:

  • Identification and Pleading Sufficiency: A threshold issue will be the identification of the accused instrumentalities. The complaint's reliance on external exhibits to identify the accused products and provide the basis for infringement may raise questions regarding whether it meets federal pleading standards, which require sufficient factual matter to state a plausible claim for relief.
  • Defendant's Role as "User": As the defendant is a financial institution and not a technology manufacturer, the case appears to be centered on its role as an end-user of products that allegedly contain infringing memory components. A key question will therefore be whether the defendant's "use" of commercially available hardware constitutes direct infringement of the asserted patent claims.
  • Technical Application: Once the accused products and asserted claims are clarified, the dispute will turn on technical questions of scope. For the ’046 Patent, analysis will likely focus on whether the accused memory systems implement the claimed dual-mode (single-word vs. multi-word) data retrieval logic. For the ’960 Patent, the central question will be whether the accused devices perform the claimed method of sectionalized refresh operations to conserve power.