DCT

1:25-cv-01573

Sovereign Peak Ventures LLC v. NXP Semiconductors NV

Key Events
Amended Complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 1:25-cv-01573, W.D. Tex., 12/12/2025
  • Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Defendant NXP maintains a regular and established place of business in the district, including its U.S. Corporate Headquarters in Austin.
  • Core Dispute: Plaintiff alleges that Defendant’s application processors capable of encoding or decoding video using the H.265/HEVC standard infringe five U.S. patents relating to digital video broadcasting, image coding, and parallel processing techniques.
  • Technical Context: The technology at issue involves methods for efficiently compressing and processing digital video, particularly related to the High Efficiency Video Coding (HEVC/H.265) standard, which is foundational for streaming and storing high-resolution video content in modern electronics.
  • Key Procedural History: The complaint states that Plaintiff acquired a portfolio of patents invented by employees of Panasonic Corporation. Plaintiff also alleges it provided Defendant with notice of infringement on two separate dates, July 19, 2024, and January 28, 2025, prior to filing the complaint.

Case Timeline

Date Event
2004-05-31 Priority Date for U.S. Patent 7,685,498
2007-01-18 Priority Date for U.S. Patent 8,019,169
2008-11-10 Priority Date for U.S. Patent 8,737,476
2009-03-31 Priority Date for U.S. Patent 8,971,401
2010-03-23 U.S. Patent 7,685,498 Issued
2010-10-04 Priority Date for U.S. Patent 9,414,059
2011-09-13 U.S. Patent 8,019,169 Issued
2014-05-27 U.S. Patent 8,737,476 Issued
2015-03-03 U.S. Patent 8,971,401 Issued
2016-01-01 NXP merger with Freescale Semiconductor mentioned
2016-08-09 U.S. Patent 9,414,059 Issued
2024-07-19 First alleged Notice Date of infringement provided to Defendant
2025-01-28 Second alleged Notice Date of infringement provided to Defendant
2025-12-12 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,685,498 - *“Digital Broadcasting System and Digital Broadcast Transmission Reception Method”*

Issued March 23, 2010

The Invention Explained

  • Problem Addressed: The patent addresses the challenge of maintaining continuous broadcast reception on mobile terminals, particularly in conditions with a low carrier-to-noise ratio where data bursts may be missed, leading to service interruption and increased power consumption during resynchronization attempts (’498 Patent, col. 1:53-2:2).
  • The Patented Solution: The invention proposes a hierarchical coding system that separates a broadcast source into a "first layer code" and a "second layer code." These codes are packaged into "data bursts" for transmission. The concept is that even if the higher-quality first layer is lost due to poor signal, the more robust second layer can still be decoded, allowing for continuous, albeit potentially lower-quality, reproduction of the broadcast source without complete interruption (’498 Patent, Abstract; col. 2:24-30).
  • Technical Importance: This layered approach to data transmission provides enhanced error resilience, a critical feature for mobile broadcasting applications where signal strength can fluctuate significantly.

Key Claims at a Glance

  • The complaint asserts independent claims 9 and 10 (Compl. ¶ 94).
  • Claim 9 (Transmission Apparatus): Recites an apparatus comprising:
    • a coding unit to generate a first layer code and a second layer code from a broadcast source.
    • a synthesizing unit to generate data bursts including the first and second layer codes.
    • a multiplexing unit to create a broadcast stream by multiplexing the data bursts.
    • a transmitting unit to transmit the stream.
  • Claim 10 (Reception Apparatus): Recites an apparatus comprising:
    • a receiving unit to receive the broadcast stream.
    • a decoding unit to extract at least one of the first and second layer codes.
    • a reproducing unit to reproduce the broadcast source using the extracted code(s).
  • The complaint does not explicitly reserve the right to assert dependent claims for this patent.

U.S. Patent No. 8,019,169 - *“Image Coding Apparatus, Image Decoding Apparatus, Image Processing Apparatus and Methods Thereof”*

Issued September 13, 2011

The Invention Explained

  • Problem Addressed: The patent seeks to improve the compression efficiency of still images or intra-coded frames in a video, which traditionally rely only on spatial redundancy within the single image and thus have lower compression rates than inter-coded frames (’169 Patent, col. 1:10-16).
  • The Patented Solution: The invention describes a method where, instead of using conventional intra-frame prediction, the coder searches "a group of images" to find a "second still image" that is similar to the "first still image" being coded. This similar image is then used as a reference to generate a predictive image, and only the difference (residual) is coded into the bitstream, along with information indicating the location of the reference image used (’169 Patent, Abstract).
  • Technical Importance: This technique leverages temporal or external redundancy for images that would typically be limited to less efficient spatial compression, suggesting a significant potential increase in coding efficiency.

Key Claims at a Glance

  • The complaint asserts independent claims 20 and 21 (Compl. ¶ 118).
  • Claim 20 (Coding Method): Recites the steps of:
    • searching at least one second still image which is similar to a first still image from a group of images.
    • generating a predictive image for the first still image using the second still image as a reference.
    • coding by generating a bit stream from the difference between the first still image and the predictive image.
    • adding, to the bit stream, information which indicates a location of the second still image.
  • Claim 21 (Decoding Method): Recites the steps of:
    • acquiring a bit stream and additional information indicating a first still image.
    • acquiring a second still image indicated in the additional information.
    • generating a predictive image for the first image using the second still image as a reference.
    • adding a prediction residual from the bit stream to the predictive image to obtain the first still image.
  • The complaint does not explicitly reserve the right to assert dependent claims for this patent.

U.S. Patent No. 8,737,476 - *“Image Decoding Device, Image Decoding Method, Integrated Circuit, and Program for Performing Parallel Decoding of Coded Image Data”*

Issued May 27, 2014

  • Technology Synopsis: The patent describes a method for improving parallel decoding efficiency. It involves "pre-decoding" reference information to calculate a "predictive data amount" needed from storage for upcoming blocks, and then using this predictive amount to determine which blocks can be decoded in parallel in a manner that reduces variations in data readouts from the storage unit (’476 Patent, Abstract; Compl. ¶ 48).
  • Asserted Claims: At least Claim 14 (Compl. ¶ 142).
  • Accused Features: The complaint alleges that the accused products' H.265 decoders perform this method by using Reference Picture Set (RPS) information from a slice header to determine the number and amount of reference images required, and then determining how to decode multiple blocks (CTUs) in parallel (Compl. ¶¶ 50-52, 57, 60).

U.S. Patent No. 8,971,401 - *“Image Decoding Device”*

Issued March 3, 2015

  • Technology Synopsis: The patent discloses an image decoding device architecture for parallel processing. It features a "stream divider" that splits an input bitstream into a plurality of "sub-streams," which are then fed to a corresponding plurality of "image decoders." The divider is configured to group prediction units such that units from different macroblocks are included in different sub-streams to facilitate parallel decoding (’401 Patent, Abstract; Compl. ¶ 63).
  • Asserted Claims: At least Claim 1 (Compl. ¶ 166).
  • Accused Features: The complaint alleges that the HEVC decoders in the accused products function as the claimed device. The decoder allegedly acts as a "stream divider" by processing different color components (luma and chroma) as distinct "sub-streams," which are then decoded by a "plurality of image decoders" implemented via the products' multi-core architecture (Compl. ¶¶ 66-68, 70-71).

U.S. Patent No. 9,414,059 - *“Image Processing Device, Image Coding Method, and Image Processing Method”*

Issued August 9, 2016

  • Technology Synopsis: This patent describes an image processing device that performs pipelined operations on a coded stream containing coding units of various sizes. A "control unit" divides the stream into "plural first processing unit blocks" of a fixed size, and then controls "plural first process units" to execute pipelined processes on these fixed-size blocks, thereby improving efficiency by standardizing the processing workload at each pipeline stage (’059 Patent, Abstract; Compl. ¶ 73).
  • Asserted Claims: At least Claim 1 (Compl. ¶ 190).
  • Accused Features: The complaint maps this invention to the accused products' multi-core HEVC decoders, which use pipelined coding operations. The device's "control path" is alleged to be the claimed "control unit," and the fixed-size Coding Tree Units (CTUs) of the HEVC standard are alleged to be the "plural first processing unit blocks" of a fixed pixel size (Compl. ¶¶ 74-76, 82-84).

III. The Accused Instrumentality

Product Identification

  • The complaint identifies the accused products as NXP's application processors within the i.MX8, i.MX 8M, i.MX 8M Mini, i.MX 8M Plus, and i.MX 8X families, collectively termed the "HEVC Accused Products" (Compl. ¶ 14).

Functionality and Market Context

  • These products are described as semiconductors, specifically system-on-chip (SoC) processors, that contain dedicated hardware capabilities, such as a Video Processing Unit (VPU), for encoding and/or decoding video streams compliant with the H.265/HEVC standard (Compl. ¶ 14). The complaint provides a table from NXP's website, titled "i.MX 8 Series Products," which lists various processors and confirms their capability to handle H.265 video (Compl. p. 6). The products are positioned for a wide range of markets, including automotive, industrial, Internet of Things (IoT), mobile, and communication infrastructure (Compl. ¶ 5). The complaint also includes a block diagram for the i.MX 8M Plus processor, which explicitly shows a "Vision" block containing a "1080p60 H.265, H.264, VP9, VP8 decoder" and a "1080p60 H.265, H.264 encoder" (Compl. p. 8).

IV. Analysis of Infringement Allegations

’498 Patent Infringement Allegations

Claim Element (from Independent Claim 9) Alleged Infringing Functionality Complaint Citation Patent Citation
a coding unit operable to code the broadcast source based on a characteristic of the broadcast source and operable to generate a first layer code and a second layer code, respectively, being for reproduction of the broadcast source The H.265 encoder in the i.MX 8M Plus processor encodes a video source based on spatial/temporal dependencies, generating NAL units of VCL and non-VCL types. ¶¶19-21 col. 6:1-12
a synthesizing unit operable to generate data bursts, each of the generated data bursts including the generated first layer code and second layer code The processor generates "access units," which are described as data bursts containing the VCL and non-VCL NAL units. ¶22 col. 6:13-22
a multiplexing unit operable to create the broadcast stream by multiplexing the generated data bursts The processor assembles the access units into a continuous bitstream. ¶23 col. 6:23-28
a transmitting unit operable to transmit the created broadcast stream to the network The processor’s network interfaces output the complete bitstream to a network such as the Internet. ¶24 col. 6:29-31
  • Identified Points of Contention:
    • Scope Questions: A central question may be whether the "first layer code" and "second layer code" recited in the claim can be construed to read on the H.265 standard's distinction between Video Coding Layer (VCL) NAL units (picture data) and non-VCL NAL units (supplemental information). The defendant may argue the patent’s specification describes a layered coding scheme for error resilience (e.g., a base layer and an enhancement layer), which is functionally different from the VCL/non-VCL distinction.
    • Technical Questions: What evidence does the complaint provide that the VCL and non-VCL codes are "respectively... for reproduction of the broadcast source" in the manner required by the claim? The functionality of non-VCL units as supplemental information raises the question of whether they directly contribute to "reproduction" in the same sense as the VCL picture data.

’169 Patent Infringement Allegations

Claim Element (from Independent Claim 20) Alleged Infringing Functionality Complaint Citation Patent Citation
searching at least one second still image which is similar to a first still image from a group of images The accused processor performs a motion estimation process where the encoder searches a "Reference Frame," which is alleged to be a similar still image. ¶35 col. 4:39-44
generating a predictive image for the first still image using the at least one second still image as a reference image The processor uses an inter-prediction process where the Reference Frame is used to produce a predictive image. Motion vectors are applied to the Reference Frame to generate this image. ¶36 col. 4:45-51
coding, by generating a bit stream by coding a difference between the first still image and the predictive image The processor codes a "residual," which is the difference between the first still image (Current Frame) and the predictive image. ¶37 col. 4:45-51
adding, to the bit stream, information which indicates a location of the at least one second still image The processor's encoded bit stream includes bits that indicate an index for the reference picture used. ¶38 col. 4:55-60
  • Identified Points of Contention:
    • Scope Questions: The primary dispute may center on the term "a group of images." The complaint maps this to the HEVC standard's use of a "Reference Frame," which is typically a prior frame from the same video sequence stored in a buffer (Compl. ¶ 35). The defendant may argue that the patent specification teaches a broader search, potentially including images from external databases or the internet, and that a standard reference frame from the same video sequence does not meet the claim's scope. The complaint illustrates this concept with a diagram showing a "Reference Frame" and a "Current Frame" (Compl. p. 24).
    • Technical Questions: Does a "frame" from a video sequence qualify as a "still image" as that term is used in the patent? While often treated as such in litigation, the distinction could become a point of argument depending on the intrinsic evidence.

V. Key Claim Terms for Construction

For the ’498 Patent

  • The Term: "first layer code and a second layer code"
  • Context and Importance: The construction of this term is fundamental to the infringement theory. Plaintiff’s case appears to depend on mapping this term to the VCL and non-VCL NAL units of the H.265 standard. The outcome of this construction could determine whether a standard-compliant HEVC encoder falls within the claim scope.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The claim language itself is general, reciting two distinct "codes" that are "for reproduction of the broadcast source" (Compl. ¶ 16). This could support an argument that any two functionally distinct code types within a stream, like VCL and non-VCL, are covered. The patent describes the hierarchical coding unit generating an "upper layer code 3" and a "lower layer code 4" without strictly limiting their function to error resilience in the claims (’498 Patent, col. 6:1-12).
    • Evidence for a Narrower Interpretation: The patent's background and summary emphasize error resilience, stating the structure allows "the lower layer... to continue the reproduction of the service without being interrupted" if the upper layer is lost (’498 Patent, col. 2:24-30). This suggests the layers must have a base/enhancement relationship for providing graceful degradation, a function not necessarily inherent to the VCL/non-VCL distinction.

For the ’169 Patent

  • The Term: "a group of images"
  • Context and Importance: This term defines the search space for the reference image. The infringement allegation hinges on this term encompassing the reference picture buffer used in standard HEVC inter-frame prediction. Practitioners may focus on this term because the patent’s specification describes embodiments that go far beyond a typical video codec's reference buffer.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The claim language is broad and does not explicitly limit the "group." One could argue that the set of frames available in a decoder's reference picture buffer constitutes "a group of images" available for the search. The abstract simply states the search is from "a group of images" without further limitation (’169 Patent, Abstract).
    • Evidence for a Narrower Interpretation: The detailed description contemplates a much broader search space, including images stored locally in a separate storage medium or on a server accessible via the Internet (’169 Patent, col. 10:1-3, FIG. 2). This may support an argument that the term was intended to cover searches beyond the limited set of preceding frames in the same video sequence.

VI. Other Allegations

  • Indirect Infringement: The complaint makes detailed allegations for both induced and contributory infringement for all five asserted patents. It alleges NXP had knowledge of the patents at least as of the notice dates (Compl. ¶¶ 100, 124, 148, 172, 196). Inducement is alleged based on NXP’s marketing of HEVC/H.265 features, providing technical assistance, and publishing instructional materials, manuals, and online support forums that direct users to operate the accused products in an infringing manner (Compl. ¶¶ 103, 127). The complaint includes a screenshot from an NXP community forum as evidence of such instruction (Compl. p. 79). Contributory infringement is alleged on the basis that the HEVC/H.265 features are especially made for infringement, are not a staple article of commerce, and have no substantial non-infringing use (Compl. ¶¶ 107-111).
  • Willful Infringement: Willfulness is alleged for all five patents, based on NXP’s continued infringing conduct after receiving notice of infringement on two pre-suit dates, July 19, 2024, and January 28, 2025 (Compl. ¶¶ 88, 112).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of definitional scope: Can claim terms written in a general, functional manner (e.g., "first and second layer code," "a group of images," "stream divider") be construed to cover specific, and potentially distinct, implementations found in the later-developed H.265/HEVC standard? The case for several patents may depend on whether routine functions of a standards-compliant codec are equivalent to the specific solutions described in the patents.
  • A key evidentiary question will be one of functional equivalence: Does the accused processors' architecture, designed to implement the HEVC standard, actually operate in the manner claimed by the patents? For instance, with respect to the ’401 patent, does parallel processing of luma and chroma data function as a "stream divider" that creates "sub-streams" containing "prediction units from different macroblocks," or is this an attempt to map claim language onto a technically distinct parallel processing architecture?
  • A third major question relates to pipelining and control: For the ’059 patent, the dispute may focus on whether the accused HEVC decoder, which processes variable-size coding units, is controlled in the specific manner claimed—that is, by first dividing the stream into fixed-size "processing unit blocks" to normalize the pipeline. The analysis will likely scrutinize whether the processor's control logic actually performs this claimed division step or if it employs a different pipelining strategy that falls outside the claim scope.