DCT
1:25-cv-01768
Dynacap LLC v. Apple Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: DynaCap LLC (Texas)
- Defendant: Apple Inc. (California); STMicroelectronics N.V. (Netherlands); STMicroelectronics, Inc. (Delaware)
- Plaintiff’s Counsel: DiNovo Price LLP
- Case Identification: 1:25-cv-01768, W.D. Tex., 11/03/2025
- Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Defendants maintain regular and established places of business in the district. The complaint asserts that Apple operates large campuses, an engineering center, and retail stores in Austin, and that STMicroelectronics maintains offices and utilizes local distributors within the district.
- Core Dispute: Plaintiff alleges that Defendants’ consumer electronics and semiconductor components, which utilize embedded microelectronic capacitors, infringe three patents related to specific capacitor structures and fabrication methods.
- Technical Context: The technology at issue concerns the design of embedded microelectronic capacitors, which are critical components for achieving miniaturization and high-frequency signal integrity in complex modern electronics.
- Key Procedural History: The complaint notes that the patents-in-suit have expired, which suggests the primary remedy sought will be monetary damages for past infringement rather than an injunction against future sales.
Case Timeline
| Date | Event |
|---|---|
| 2003-04-30 | U.S. Patent No. 6,813,138 Priority Date |
| 2003-11-14 | U.S. Patent No. 6,969,912 Priority Date |
| 2004-01-16 | U.S. Patent No. 7,035,082 Priority Date |
| 2004-11-02 | U.S. Patent No. 6,813,138 Issue Date |
| 2005-11-29 | U.S. Patent No. 6,969,912 Issue Date |
| 2006-04-25 | U.S. Patent No. 7,035,082 Issue Date |
| 2012-09-21 | Accused Product Launch (Apple iPhone 5) |
| 2014-09-19 | Accused Product Launch (Apple iPhone 6 Plus) |
| 2020-10-23 | Accused Product Launch (Apple iPhone 12 Pro) |
| 2025-11-03 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,813,138 - “Embedded Microelectronic Capacitor Equipped with Geometrically-Centered Electrodes and Method of Fabrication”
- Patent Identification: U.S. Patent No. 6,813,138, “Embedded Microelectronic Capacitor Equipped with Geometrically-Centered Electrodes and Method of Fabrication,” issued November 2, 2004 (the “’138 Patent”).
The Invention Explained
- Problem Addressed: The patent’s background section describes how conventional connection methods for embedded capacitors, such as "edge connection," occupy excessive circuit real estate and produce parasitic effects that degrade the capacitor's high-frequency electrical characteristics (’138 Patent, col. 1:47-65).
- The Patented Solution: The invention proposes a capacitor structure where the electrical connection is made through a "center via" passing through an aperture in the middle electrode plate. By locating the connection point near the geometric center of the electrode, the design aims to improve high-frequency performance, balance the equivalent circuit, and simplify connections to surrounding elements (’138 Patent, col. 2:12-25; Abstract). Figure 4B of the patent illustrates a cross-section of this single-port, dual-layer structure (’138 Patent, col. 4:51-54).
- Technical Importance: As operating frequencies in digital and analog circuits increased, minimizing parasitic inductance and capacitance became critical for maintaining signal integrity and achieving higher self-vibration frequencies in components (’138 Patent, col. 1:32-38).
Key Claims at a Glance
- The complaint asserts independent claim 1 (Compl. ¶29, ¶58).
- The essential elements of claim 1 include:
- An upper electrode plate of a first polarity.
- A middle electrode plate of a second, opposite polarity with an aperture therethrough.
- At least one lower electrode plate of the first polarity, electrically connected to the upper plate through a via that passes through the middle plate's aperture without shorting.
- The via is positioned at a distance from the geometric center of the middle plate of not more than 50% of the middle plate's diameter.
- A first electrical lead is connected to an edge portion of the upper plate, with all plates embedded in parallel within a dielectric material.
- The complaint reserves the right to proceed under the doctrine of equivalents but does not explicitly assert dependent claims (Compl. ¶58).
U.S. Patent No. 6,969,912 - “Embedded Microelectronic Capacitor Incorporating Ground Shielding Layers and Method for Fabrication”
- Patent Identification: U.S. Patent No. 6,969,912, “Embedded Microelectronic Capacitor Incorporating Ground Shielding Layers and Method for Fabrication,” issued November 29, 2005 (the “’912 Patent”).
The Invention Explained
- Problem Addressed: The patent identifies the problem of "undesirable parasitic effect[s]" and "cross-talking" that arise from the "ever-decreasing distances between the embedded elements" in modern, high-density microelectronic fabrication, which can lead to a loss of signal integrity (’912 Patent, col. 2:17-25).
- The Patented Solution: The invention claims to solve this problem by incorporating "ground shielding layers in the capacitor structure" (’912 Patent, col. 2:30-34). Specifically, it describes a middle ground shielding layer positioned in the same plane as, and surrounding, an electrode plate to isolate it from electrical noise and interference (’912 Patent, Abstract; Fig. 2B).
- Technical Importance: In densely packed circuits, electrically isolating sensitive analog or high-speed digital components is crucial for reliable performance, and integrating shielding directly into the component structure is a space-efficient method to achieve this isolation (’912 Patent, col. 2:12-25).
Key Claims at a Glance
- The complaint asserts independent claim 1 (Compl. ¶34, ¶61).
- The essential elements of claim 1 include:
- An upper ground shielding layer having an aperture.
- An electrode plate, spaced-apart from the upper ground shielding layer, with a via extending upward through the aperture to provide electrical communication.
- A middle ground shielding layer positioned in the same plane as the electrode plate, surrounding and spaced-apart from it.
- A dielectric material embedding the upper and middle ground shielding layers.
- The complaint reserves the right to proceed under the doctrine of equivalents but does not explicitly assert dependent claims (Compl. ¶61).
U.S. Patent No. 7,035,082 - “Structure of Multi-Electrode Capacitor and Method for Manufacturing Process of the Same”
- Patent Identification: U.S. Patent No. 7,035,082, “Structure of Multi-Electrode Capacitor and Method for Manufacturing Process of the Same,” issued April 25, 2006 (the “’082 Patent”).
- Technology Synopsis: The patent describes a multi-electrode capacitor designed to provide high capacitance for decoupling applications within a printed circuit board (PCB) (’082 Patent, col. 2:20-24). The invention utilizes an "edge-coupled effect" between a plurality of metal laminates, or plates, to achieve efficient capacitance in a limited area, thereby helping to suppress noise in high-frequency systems (Compl. ¶27; ’082 Patent, Abstract).
- Asserted Claims: The complaint asserts independent claim 5 (Compl. ¶39, ¶64).
- Accused Features: The complaint alleges that multi-electrode capacitors within the accused products, such as "Capacitor 1" from the iPhone 12 Pro analysis, infringe by comprising multiple conducting layers (e.g., L2-L6) that form plates separated by spaces, with vias connecting these layers to surface-mounted devices (Compl. ¶40-42). The complaint provides an image showing these multiple layers from a teardown analysis (Compl. p. 19).
III. The Accused Instrumentality
Product Identification
- The complaint accuses certain models of Apple’s iPhone and iPad product lines, including the iPhone 12 Pro, of infringement (Compl. ¶28). It also accuses a range of STMicroelectronics ("STMicro") MEMS sensors, such as microphones and accelerometers, that are allegedly incorporated into Apple's products (Compl. ¶18, ¶43).
Functionality and Market Context
- The accused instrumentalities are mass-market consumer electronic devices and the semiconductor components within them. The relevant technical functionality involves embedded microelectronic capacitors used in their internal circuitry. The complaint provides teardown analyses of a capacitor within the iPhone 12 Pro's wide-angle camera sensor and an STMicro MEMS microphone from an iPhone 6 Plus to illustrate the allegedly infringing structures (Compl. ¶30, ¶44). These analyses and accompanying images depict multi-layered capacitor structures with patterned electrode plates, ground shields, vias, and dielectric material (Compl. ¶30-42). The complaint alleges that STMicro fabricates or supplies these infringing components, which Apple then integrates into its downstream products (Compl. ¶18-19).
IV. Analysis of Infringement Allegations
’138 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| an upper electrode plate of a first polarity; | The accused capacitors allegedly include "L3' Electrode Plates." | ¶30 | col. 4:15-16 |
| a middle electrode plate of a second polarity opposite to said first polarity of said upper electrode plate having an aperture therethrough; | The layer identified as "L4' Ground shielding layer" allegedly functions as the middle electrode plate and has an aperture (labeled A1 or A2). | ¶31 | col. 4:16-18 |
| at least one lower electrode plate of said first polarity in electrical communication with said upper electrode plate through a via positioned through said center aperture... said via being positioned at a distance from a geometric center... of not larger than 50% of a diameter of said middle electrode plate; | The "L5' Electrode Plates" are allegedly in communication with the L3' plates via a via (V1 or V2) passing through the aperture in the L4' layer, with the via's position meeting the claim's requirement. | ¶32 | col. 4:20-24 |
| a first electrical lead connected to an edge portion of said upper electrode plate wherein said upper electrode plate, said middle electrode plate and said at least one lower electrode plate are embedded parallel to each other in at least one dielectric material forming at least a single-port capacitor. | The complaint alleges the accused capacitors include an electrical lead connected to an edge portion of the upper plate, and that the plates are embedded in parallel within a dielectric material, illustrated by a cross-section image highlighting the "black area" as the dielectric. | ¶33 | col. 4:11-14 |
- Identified Points of Contention:
- Scope Questions: A primary dispute may arise from the allegation that a component labeled a "Ground shielding layer" (L4') in the complaint's own analysis satisfies the claim limitation of a "middle electrode plate of a second polarity." The analysis will question whether a shielding structure can be considered an "electrode plate" for purposes of forming a capacitor as claimed in the patent.
- Technical Questions: The complaint asserts that the via is positioned within 50% of the middle plate's diameter from its geometric center, a key limitation of the claim (Compl. ¶32). An image with labels "Dv1", "C", and "Dg" is provided to support this (Compl. p. 15). A central evidentiary question will be what factual measurements and analysis support this conclusory allegation for a microscopic component.
’912 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| an upper ground shielding layer having an aperture therethrough; | The layer identified as "L4'" in the teardown images is alleged to be an upper ground shielding layer with a central aperture. | ¶35 | col. 6:46-47 |
| an electrode plate positioned spaced-apart from said upper ground shielding layer having a via extending upwardly away from said electrode plate through said aperture... providing electrical communication to said electrode plate without shorting...; | The "L3' Electrode Plates" are allegedly spaced-apart from the L4' layer, with a via (V1 or V2) extending through the aperture in L4' to provide electrical communication. This is supported by an annotated teardown photograph. | ¶36 | col. 6:48-53 |
| a middle ground shielding layer positioned in the same plane of said electrode plate and surrounding while spaced-apart from said electrode plate at a predetermined distance; | The complaint alleges that a "middle ground shielding layer" is found in the same plane (within layer L3') as, and surrounding, the "L3' Electrode Plates." An annotated image shows the relative positioning of these structures. | ¶37 | col. 6:54-57 |
| a dielectric material embedding said upper ground shielding layer and said middle ground shielding layer. | The complaint alleges that a dielectric material embeds the shielding layers, referencing a cross-section image where this material is identified as the "Black area." | ¶38 | col. 6:58-60 |
- Identified Points of Contention:
- Scope Questions: The definition of "in the same plane" will be a likely point of dispute. The parties may contest whether two structures formed within the same lithographic layer, but potentially at slightly different vertical heights or with topographical variations, can be considered "in the same plane" as required by the claim.
- Technical Questions: The complaint alleges the existence of a "middle ground shielding layer" surrounding an "electrode plate" within the same layer L3' of the accused device (Compl. ¶37). The factual basis for distinguishing between the "electrode" and "shielding" portions of this single conductive layer, and proving they function as claimed, will be a key technical question.
V. Key Claim Terms for Construction
"middle electrode plate" (’138 Patent, Claim 1)
- Context and Importance: This term is critical because Plaintiff maps it to a structure its own analysis labels a "Ground shielding layer" (Compl. ¶31). The viability of the infringement theory for the ’138 Patent may depend on whether a structure primarily intended for shielding can also be construed as a capacitor's "electrode plate."
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification notes that a dual-port capacitor can be formed where the middle electrode is not grounded, or a single-port version can be formed where the "center electrode plate 66 may be grounded" (’138 Patent, col. 5:28-31). This may support an argument that a grounded layer can function as the claimed "middle electrode plate."
- Evidence for a Narrower Interpretation: The patent consistently describes the invention as a three-plate capacitor structure (upper, middle, lower plates) for charge storage (’138 Patent, col. 2:34-48). The figures separately depict electrode plates (e.g., 62, 66, 56) and ground planes (68), suggesting a potential distinction between a charge-storing "electrode plate" and a "ground" or "shielding" structure.
"in the same plane" (’912 Patent, Claim 1)
- Context and Importance: The claim requires the "middle ground shielding layer" and the "electrode plate" to be "in the same plane." In the context of semiconductor fabrication, where layers have thickness and topographical features, the precise meaning of this geometric term will be central to determining infringement. Plaintiff alleges structures within the same fabricated layer meet this limitation (Compl. ¶37).
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent does not provide an explicit definition. A party could argue that "in the same plane" refers to structures formed during the same deposition and etching step, making them part of a single, co-planar conductive layer from a manufacturing perspective.
- Evidence for a Narrower Interpretation: The patent drawings, such as Figure 2B, depict the middle ground shielding layer (42) and the electrode plate (22) as being perfectly coplanar and laterally separated. This could support a stricter, geometric interpretation that might not be met if there are any vertical offsets between the accused structures.
VI. Other Allegations
- Indirect Infringement: The complaint does not provide sufficient detail for analysis of indirect infringement. While it alleges Defendants committed acts of infringement "individually and/or jointly with others" (Compl. ¶58), it does not plead specific facts to establish the knowledge and intent required for induced infringement or contributory infringement.
- Willful Infringement: The complaint does not contain an explicit count for willful infringement or allege that Defendants had pre-suit knowledge of the patents-in-suit. The prayer for relief includes a request for enhanced damages pursuant to 35 U.S.C. § 284, but the complaint's factual section does not provide a basis to support a finding of egregious conduct that might warrant such an award (Compl. ¶67.b).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of definitional scope: can a structure identified as a "ground shielding layer" in technical analysis satisfy the ’138 patent's claim for a "middle electrode plate of a second polarity," or are these terms functionally and structurally distinct within the context of the patent?
- A second central question will be evidentiary: what factual proof will be presented to verify that the microscopic structures inside the accused products meet the precise geometric and positional requirements of the claims, such as the via's placement "not larger than 50% of a diameter" from the center ('138 Patent) and the components being "in the same plane" ('912 Patent)?
- Finally, the case raises a question of apportioning liability: how will fault and damages be allocated between STMicro, the alleged upstream component manufacturer, and Apple, the downstream integrator that sells the final accused products to consumers?