DCT

6:20-cv-01210

Ocean Semiconductor LLC v. MediaTek Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 6:20-cv-01210, W.D. Tex., 12/31/2020
  • Venue Allegations: Venue is alleged to be proper as Defendant MediaTek Inc. is a foreign corporation subject to personal jurisdiction in the district, and Defendant MediaTek USA Inc. has a regular and established place of business in Austin, Texas, within the district.
  • Core Dispute: Plaintiff alleges that semiconductor products designed by Defendant and manufactured by its foundry partners are made using processes that infringe seven U.S. patents related to semiconductor fabrication process control, scheduling, and equipment.
  • Technical Context: The patents relate to advanced process control (APC), fault detection, and physical wafer handling within semiconductor manufacturing facilities, technologies critical for optimizing production yield, throughput, and device quality.
  • Key Procedural History: The complaint alleges Defendant was placed on notice of infringement for four patents on October 15, 2020, and for three additional patents on November 25, 2020. Subsequent to the filing of this complaint, Inter Partes Review (IPR) proceedings were initiated against several of the asserted patents. According to the provided patent certificates, all asserted claims of U.S. Patents 6,725,402; 6,907,305; 6,968,248; and 8,676,538 have been cancelled. This procedural development suggests that the infringement claims related to these four patents may no longer be viable.

Case Timeline

Date Event
2000-07-31 U.S. Patent 6725402 Priority Date
2001-11-08 U.S. Patent 6660651 Priority Date
2002-04-30 U.S. Patent 6907305 Priority Date
2002-04-30 U.S. Patent 6968248 Priority Date
2003-03-05 U.S. Patent 7080330 Priority Date
2003-05-01 U.S. Patent 6836691 Priority Date
2003-12-09 U.S. Patent 6,660,651 Issued
2004-04-20 U.S. Patent 6,725,402 Issued
2004-11-02 U.S. Patent 8676538 Priority Date
2004-12-28 U.S. Patent 6,836,691 Issued
2005-06-14 U.S. Patent 6,907,305 Issued
2005-11-22 U.S. Patent 6,968,248 Issued
2006-07-18 U.S. Patent 7,080,330 Issued
2014-03-18 U.S. Patent 8,676,538 Issued
2020-10-15 Defendant allegedly put on notice of ’651, ’402, ’305, ’248 patents
2020-11-25 Defendant allegedly put on notice of ’330, ’691, ’538 patents
2020-12-31 Complaint Filed
2021-08-03 IPR filed against ’402, ’305, ’248, ’538 Patents

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,660,651 - “Adjustable Wafer Stage, and a Method and System for Performing Process Operations Using Same,” issued December 9, 2003

The Invention Explained

  • Problem Addressed: The patent addresses the problem of "across-wafer variations" in semiconductor manufacturing, where deposition and etching processes create non-uniform layer thicknesses or feature sizes across the surface of a silicon wafer (’651 Patent, col. 2:35-50).
  • The Patented Solution: The invention proposes a process tool with a wafer stage whose surface plane can be physically adjusted. The stage can be raised, lowered, or tilted using mechanisms like pneumatic cylinders or rack and pinion systems to counteract the process non-uniformities and ensure a more consistent result across the entire wafer (’651 Patent, Abstract; col. 6:5-28).
  • Technical Importance: As semiconductor feature sizes shrink, precision becomes paramount, and this invention provides a mechanical means to improve process uniformity, potentially increasing device yield and performance (’651 Patent, col. 2:51-65).

Key Claims at a Glance

  • The complaint asserts independent claim 19 (Compl. ¶72).
  • The essential elements of claim 19 are:
    • Providing a process chamber with an adjustable wafer stage.
    • Adjusting the wafer stage surface by actuating pneumatic cylinders to achieve raising, lowering, or tilting.
    • Positioning a wafer on the stage.
    • Performing a process operation on the wafer.
  • The complaint reserves the right to assert additional claims (Compl. ¶89).

U.S. Patent No. 6,725,402 - “Method and Apparatus for Fault Detection of a Processing Tool and Control Thereof Using an Advanced Process Control (APC) Framework,” issued April 20, 2004

The Invention Explained

  • Problem Addressed: The patent identifies the delay in reporting faults during semiconductor manufacturing, which can lead to the continued production of defective devices and increased costs (’402 Patent, col. 1:31-38).
  • The Patented Solution: The invention describes a fault detection system integrated with an Advanced Process Control (APC) framework. The system receives operational state data from a processing tool, sends it to a dedicated fault detection unit for analysis, and if a fault is found, the framework performs a predetermined action, such as halting the tool, to prevent further defects (’402 Patent, Abstract; col. 2:41-51).
  • Technical Importance: The invention provides for more immediate, automated fault detection and response, minimizing the production of faulty wafers and improving overall factory efficiency (’402 Patent, col. 1:34-42).

Key Claims at a Glance

  • The complaint asserts independent claim 1 (Compl. ¶92).
  • The essential elements of claim 1 are:
    • Receiving operational state data of a processing tool at a first interface.
    • Sending the state data to a fault detection unit, which involves accumulating the data and translating it between communication protocols.
    • Determining if a fault condition exists based on the state data.
    • Performing a predetermined action on the tool in response to a fault.
    • Sending an alarm signal from the fault detection unit to an APC framework.
    • Sending a signal from the framework back to the first interface that is reflective of the predetermined action.
  • The complaint reserves the right to assert additional claims (Compl. ¶109).

Multi-Patent Capsule: U.S. Patent Nos. 6,907,305 and 6,968,248

  • Patent Identification: ’305 Patent, "Agent Reactive Scheduling in an Automated Manufacturing Environment," issued June 14, 2005. ’248 Patent, same title, issued November 22, 2005.
  • Technology Synopsis: These patents address inefficiencies in factory control systems by proposing a system of software "agents" that reactively schedule manufacturing activities (e.g., lot transport, processing) in response to factory events (e.g., a machine becoming available) (’305 Patent, Abstract; Compl. ¶36, 48).
  • Asserted Claims: Claim 1 of the ’305 Patent and Claim 1 of the ’248 Patent (Compl. ¶112, 132).
  • Accused Features: The complaint alleges that MediaTek products are manufactured using the Applied Materials SmartFactory system, which is accused of performing the patented reactive scheduling methods (Compl. ¶112, 132, 115, 135).

Multi-Patent Capsule: U.S. Patent No. 7,080,330

  • Patent Identification: ’330 Patent, "Concurrent Measurement of Critical Dimension and Overlay in Semiconductor Manufacturing," issued July 18, 2006.
  • Technology Synopsis: The patent addresses the technical problem of overlay errors in forming integrated circuits. It describes a method of partitioning a wafer into a grid to facilitate concurrent measurements of both critical dimensions and overlay, allowing for process adjustments to mitigate errors and achieve target dimensions (Compl. ¶54, 56).
  • Asserted Claims: Claim 19 of the ’330 Patent (Compl. ¶152).
  • Accused Features: The complaint alleges that MediaTek products are manufactured using the ASML YieldStar metrology and inspection system, which is accused of performing the patented concurrent measurement method (Compl. ¶152, 156).

Multi-Patent Capsule: U.S. Patent No. 6,836,691

  • Patent Identification: ’691 Patent, "Method and Apparatus for Filtering Metrology Data Based on Collection Purpose," issued December 28, 2004.
  • Technology Synopsis: The invention addresses the problem of process controllers receiving inaccurate metrology data. It describes a method of generating "context data" for metrology data, including its "collection purpose," and then filtering the data based on this context to remove outliers that are not from normal process variation, thereby improving process control (Compl. ¶60, 62).
  • Asserted Claims: Claim 1 of the ’691 Patent (Compl. ¶173).
  • Accused Features: The complaint alleges that MediaTek products are manufactured using the Applied Materials E3 system and/or PDF Solutions' Exensio system, which are accused of performing the patented data filtering method (Compl. ¶173, 176).

Multi-Patent Capsule: U.S. Patent No. 8,676,538

  • Patent Identification: ’538 Patent, "Adjusting Weighting of a parameter Relating to Fault Detection Based on a Detected Fault," issued March 18, 2014.
  • Technology Synopsis: This patent addresses inaccurate fault detection by describing a method that employs a dynamic weighting technique. The method determines a relationship between a process parameter and a detected fault, and then adjusts the weighting of that parameter in future fault detection analyses based on that relationship (Compl. ¶66, 68).
  • Asserted Claims: Claim 1 of the ’538 Patent (Compl. ¶193).
  • Accused Features: The complaint alleges that MediaTek products are manufactured using the Applied Materials E3 system and/or PDF Solutions' Exensio system, which are accused of performing the patented dynamic weighting method (Compl. ¶193, 196).

III. The Accused Instrumentality

Product Identification

  • The complaint asserts infringement under 35 U.S.C. § 271(g), targeting integrated circuits designed by MediaTek that are imported into the U.S. after being manufactured abroad by a patented process (Compl. ¶74, 94). The accused instrumentalities are therefore the manufacturing processes and the third-party systems used to perform them on behalf of MediaTek by its foundry partners, such as UMC and TSMC (Compl. ¶8, 75, 95).

Functionality and Market Context

  • The complaint alleges that MediaTek’s extensive range of semiconductor products—including the Helio, Autus, and MiraVision lines—are manufactured using specific third-party fabrication, process control, and metrology systems (Compl. ¶11, 15, 17, 19). These systems are alleged to perform the patented methods:
    • ASML TWINSCAN system: Alleged to perform fabrication using an adjustable wafer stage as claimed in the ’651 Patent (Compl. ¶72, 75).
    • Applied Materials E3 system and PDF Solutions' Exensio system: Alleged to perform advanced process control, fault detection, and data filtering as claimed in the ’402, ’691, and ’538 Patents (Compl. ¶92, 173, 193).
    • Applied Materials SmartFactory system: Alleged to perform reactive scheduling of factory events as claimed in the ’305 and ’248 Patents (Compl. ¶112, 132).
    • ASML YieldStar metrology system: Alleged to perform concurrent measurement of critical dimension and overlay as claimed in the ’330 Patent (Compl. ¶152, 156).
    • These allegations position MediaTek as a beneficiary and director of manufacturing processes performed by its partners using industry-standard, high-technology equipment (Compl. ¶8-9).

IV. Analysis of Infringement Allegations

No probative visual evidence provided in complaint.

6,660,651 Infringement Allegations

Claim Element (from Independent Claim 19) Alleged Infringing Functionality Complaint Citation Patent Citation
providing a process chamber comprised of a wafer stage, said wafer stage having a surface that is adjustable; The ASML TWINSCAN system used to manufacture the accused products provides a process chamber that includes a wafer stage with an adjustable surface. ¶75 col. 10:1-4
adjusting said surface of said wafer stage by actuating at least one of a plurality of pneumatic cylinders that are operatively coupled to said wafer stage to accomplish at least one of raising, lowering and varying a tilt of said surface of said wafer stage; During manufacture, the surface of the wafer stage is adjusted by performing at least one of raising, lowering, and varying a tilt. ¶75 col. 10:56-65
positioning a wafer on said wafer stage; and A wafer is positioned on the wafer stage after the stage has been adjusted. ¶75 col. 10:14-17
performing a process operation on said wafer positioned on said wafer stage. A process operation is performed on the wafer while it is positioned on the adjusted wafer stage. ¶75 col. 10:18-20
  • Identified Points of Contention (’651 Patent):
    • Scope Questions: A central question may be whether the term "adjusting," as used in the claim, should be limited by the patent’s specification to adjustments made for the specific purpose of correcting for "across-wafer variations" (’651 Patent, col. 2:35-39). The analysis may focus on whether the accused ASML TWINSCAN system's adjustments are for this purpose or for other functions not taught by the patent, such as focal plane leveling.
    • Technical Questions: What evidence does the complaint provide that the accused manufacturing process utilizes pneumatic cylinders for stage adjustment, as explicitly required by claim 19? The patent also discloses rack and pinion systems, but the asserted claim is specific to pneumatic cylinders.

6,725,402 Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
receiving at a first interface operational state data of a processing tool related to the manufacture of a processing piece; During manufacture using the Applied Materials E3 and/or PDF Solutions Exensio systems, operational state data of a processing tool is received at a first interface. ¶95 col. 7:42-47
sending the state data from the first interface to a fault detection unit, wherein the act of sending comprises: sending the state data from the first interface to a data collection unit; accumulating the state data at the data collection unit; translating the state data from a first communications protocol to a second communications protocol compatible with the fault detection unit; and sending the translated state data...to the fault detection unit; The state data is sent to a fault detection unit via a data collection unit, where it is accumulated and translated from a first to a second communications protocol. ¶95 col. 8:25-44
determining if a fault condition exists with the processing tool based upon the state data received by the fault detection unit; The fault detection unit determines if a fault condition exists with the tool based on the received state data. ¶95 col. 7:25-29
performing a predetermined action on the processing tool in response to the presence of a fault condition; A predetermined action is performed on the processing tool in response to a detected fault condition. ¶95 col. 7:31-34
sending an alarm signal indicative of the fault condition to an advanced process control framework from the fault detection unit...; An alarm signal indicating the fault is sent from the fault detection unit to an advanced process control framework. ¶95 col. 7:35-39
sending a signal by the framework to the first interface reflective of the predetermined action. The framework sends a signal back to the first interface that reflects the predetermined action taken. ¶95 col. 7:40-42
  • Identified Points of Contention (’402 Patent):
    • Scope Questions: Does the accused "Applied Materials E3 system and/or PDF Solutions' Exensio system" (Compl. ¶95) constitute an "advanced process control framework" as that term is used in the patent? The interpretation of this term will be critical to whether the specific alarm and control signal loops are met.
    • Technical Questions: The infringement theory rests on a highly specific, multi-step data flow and control loop. A key factual question will be whether the accused systems perform this exact sequence: data reception, accumulation, protocol translation, fault determination, predetermined action, alarm to a framework, and a reflective signal from the framework back to the initial interface. Evidence of each step in this precise sequence will be required.

V. Key Claim Terms for Construction

For the ’651 Patent

  • The Term: "adjusting said surface of said wafer stage"
  • Context and Importance: This term is the core of the invention. Its construction will determine whether any mechanical movement of the wafer stage constitutes "adjusting," or if the term is limited to movements performed for the specific purpose of correcting process non-uniformities, as described throughout the patent's specification.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: Claim 19 itself does not recite a purpose for the adjustment, only that it is done "to accomplish at least one of raising, lowering and varying a tilt" (’651 Patent, col. 10:60-62).
    • Evidence for a Narrower Interpretation: The patent’s "Background" and "Summary" sections repeatedly frame the invention as a solution to "across-wafer variations" in deposition and etching (’651 Patent, col. 2:35-65; Abstract). A court may view this context as limiting the scope of "adjusting" to its intended technical purpose.

For the ’402 Patent

  • The Term: "advanced process control framework"
  • Context and Importance: This term appears twice in claim 1 and defines the entity that receives an alarm and sends a control signal. Whether the accused E3/Exensio systems meet this definition is central to infringement. Practitioners may focus on this term because its definition could require a specific system architecture that the accused products may or may not possess.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent does not appear to provide an explicit definition of the term, which might support an interpretation based on its plain and ordinary meaning in the field of semiconductor manufacturing.
    • Evidence for a Narrower Interpretation: The specification describes the APC framework as a "component-based architecture" comprising specific modules like a "machine interface (MI) 310" and a "plan executor (PE) 330" (’402 Patent, col. 3:45-50). This detailed description could be used to argue that the claimed "framework" must contain such distinct components.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges inducement of infringement for all asserted patents. The theory is that MediaTek actively encourages and instructs its foundry partners (e.g., UMC, TSMC) to use the accused manufacturing systems and processes to fabricate its semiconductor products, knowing these processes infringe. This is supported by allegations of marketing materials, technical specifications, and direct customer support (Compl. ¶78-79, 98-99).
  • Willful Infringement: Willfulness is alleged for all patents based on actual knowledge following notice letters sent to MediaTek. The complaint identifies notice dates of October 15, 2020, and November 25, 2020, after which any continued infringement was allegedly willful (Compl. ¶88, 108, 128, 148, 169, 189, 209).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A primary issue will be one of causation and control: can Plaintiff demonstrate that MediaTek, a fabless semiconductor designer, sufficiently controls or directs the manufacturing processes of its independent foundry partners to be held liable for infringement under 35 U.S.C. § 271(g)? The case may hinge on the nature of the contractual and technical relationships between MediaTek and its foundries.
  • A second core issue will be one of functional specificity: does the accused, commercially-available manufacturing equipment perform the highly specific functions recited in the claims (e.g., the precise data-flow loop of the ’402 Patent; the purpose-driven wafer stage adjustment of the ’651 Patent)? The dispute may focus on whether there is a fundamental mismatch between the patented methods and the actual operation of the accused systems.
  • A dispositive procedural question is the viability of the asserted patents: given that post-complaint IPR proceedings resulted in the cancellation of all asserted claims for four of the seven patents-in-suit (’402, ’305, ’248, and ’538), a central question is whether the infringement counts related to these patents can proceed. The litigation's scope will likely narrow to the three patents that appear to have survived these challenges.