Cedar Lane Tech Inc v. Johnson Controls Intl

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Cedar Lane Technologies Inc. (Canada)
  • Defendant: Johnson Controls International plc (Ireland)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 6:22-cv-00539, W.D. Tex., 05/26/2022
• Venue Allegations: Plaintiff alleges venue is proper because the Defendant is a foreign corporation and has allegedly committed acts of patent infringement in the district, causing harm therein.
• Core Dispute: Plaintiff alleges that certain of Defendant’s products infringe three patents related to methods and modules for interfacing image sensors and processing hardware, specifically concerning image data buffering and compression.
• Technical Context: The patents address technical challenges in digital imaging systems, focusing on efficiently managing the transfer and formatting of data between components with different operating speeds and requirements, such as between an analog-to-digital converter and a JPEG compressor, or between a CMOS image sensor and a host processor.
• Key Procedural History: The complaint notes that U.S. Patent No. 8,537,242 is a division of the application that resulted in U.S. Patent No. 6,972,790. No other procedural events are mentioned in the complaint.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,473,527 - "Module and method for interfacing analog/digital converting means and JPEG compression means," Issued Oct. 29, 2002

The Invention Explained

• Problem Addressed: The patent describes a problem in conventional digital imaging systems where JPEG compression devices require image data to be formatted into specific blocks (e.g., 8x8 pixels) (’527 Patent, col. 1:40-45). This often necessitated an extra, external memory device to buffer and re-format line-by-line image data before it could be processed, adding to system cost and complexity (’527 Patent, col. 1:49-57).
• The Patented Solution: The invention proposes an interface module situated between an analog-to-digital (A/D) converter and a JPEG compression device (’527 Patent, Fig. 2). This module includes its own memory, sized to store a specific number of image lines (e.g., eight lines) sufficient to form a complete compression block (’527 Patent, col. 2:7-12). Once the required lines are stored, the module's control logic can directly output a correctly-sized image block to the JPEG device, eliminating the need for the separate, larger external memory previously used for this buffering task (’527 Patent, col. 2:16-23).
• Technical Importance: This approach provided a method to reduce the component count, cost, and design complexity of digital imaging hardware like scanners or digital cameras. (’527 Patent, col. 1:55-57).

Key Claims at a Glance

• The complaint asserts one or more claims of the ’527 Patent, identified as "Exemplary '527 Patent Claims" in an external exhibit (Compl. ¶13). Independent claim 1 is representative and includes the following essential elements:
  • A "read control means" for reading a "predetermined number of image lines" from an A/D converter and generating a control signal.
  • A "memory means" for storing the image lines, where the memory is "capable of storing the same number of image lines" as the "built-in memory device" of the JPEG compression means.
  • An "output control means" that responds to the control signal to sequentially read an "image block" from the "memory means" and forward it to the JPEG device's "built-in memory device".
• The complaint reserves the right to assert other claims, including dependent claims (Compl. ¶13).

U.S. Patent No. 6,972,790 - "Host interface for imaging arrays," Issued Dec. 6, 2005

The Invention Explained

• Problem Addressed: The patent addresses the incompatibility between the continuous, high-speed "video style output" of CMOS image sensors and the data interface of commercial microprocessors, which are designed for random access to memory (’790 Patent, col. 1:38-53). Bridging this gap typically required "additional glue logic," which undermined the cost and integration benefits of using CMOS technology (’790 Patent, col. 1:62-64).
• The Patented Solution: The invention describes an interface, preferably integrated on the same die as the image sensor, that acts as an intelligent buffer between the sensor and a host processor system (’790 Patent, col. 2:25-34). The interface uses a memory (such as a FIFO buffer) to store data from the sensor at the sensor's clock rate. Critically, a signal generator monitors the amount of data in the memory and, upon reaching a certain quantity, generates a signal (e.g., an interrupt) to the processor. The interface then manages the transfer of the buffered data to the processor at a rate determined by the processor, effectively decoupling the two components (’790 Patent, col. 2:4-13).
• Technical Importance: This architecture enables a more seamless and efficient integration of CMOS image sensors with standard processors, reducing the need for external interface logic and allowing the processor to perform other tasks until image data is ready for transfer. (’790 Patent, col. 4:24-28).

Key Claims at a Glance

• The complaint asserts one or more claims of the ’790 Patent, identified as "Exemplary '790 Patent Claims" in an external exhibit (Compl. ¶19). Independent claim 1 is representative and includes the following essential elements:
  • A "memory" for storing "imaging array data and clocking signals" at a rate determined by the clocking signals.
  • A "signal generator" for generating a signal for the processor system "in response to the quantity of data in the memory".
  • A "circuit for controlling the transfer of the data" from the memory at a rate "determined by the processor system".
• The complaint reserves the right to assert other claims (Compl. ¶19).

Multi-Patent Capsule

• Patent Identification: U.S. Patent No. 8,537,242, "Host interface for imaging arrays," Issued Sep. 17, 2013.
• Technology Synopsis: As a divisional of the application for the ’790 Patent, the ’242 Patent addresses the same technical field. It discloses an interface for use with an image sensor and an electronic processing system, where the interface includes a memory to buffer image data received from the sensor and a control circuit to manage the transfer of that data to the processing system's data bus, often using a bus request signal to arbitrate for access ('242 Patent, col. 2:4-24).
• Asserted Claims: The complaint asserts "Exemplary '242 Patent Claims" identified in an external exhibit (Compl. ¶28).
• Accused Features: The complaint alleges that the "Exemplary Defendant Products," as detailed in charts in Exhibit 6, infringe the patent (Compl. ¶28, ¶33).

III. The Accused Instrumentality

• Product Identification: The complaint does not name any specific accused products, methods, or services in its main body. It refers generally to "Exemplary Defendant Products" (Compl. ¶13).
• Functionality and Market Context: The complaint alleges that these "Exemplary Defendant Products" practice the technology claimed by the patents-in-suit (Compl. ¶15, ¶24, ¶33). However, it does not provide any specific details regarding the technical functionality, operation, or market context of these products, instead incorporating by reference external Exhibits 4, 5, and 6, which were not provided for analysis.

IV. Analysis of Infringement Allegations

The complaint makes general allegations of infringement for each patent-in-suit and states that detailed comparisons are provided in claim charts attached as Exhibits 4, 5, and 6 (Compl. ¶¶15, 24, 33). Because the complaint relies exclusively on these non-proffered exhibits for its infringement theories and provides no narrative summary of them, a detailed infringement analysis or claim chart summary based on the provided documents is not possible. The infringement counts consist of conclusory statements that the accused products "satisfy all elements" of the exemplary claims (Compl. ¶15, ¶24, ¶33).

No probative visual evidence provided in complaint.

• Identified Points of Contention:
  • Evidentiary Questions: A threshold issue for the court will be whether the evidence presented in the complaint's exhibits, once produced, is sufficient to support the allegations that the accused products meet each limitation of the asserted claims.
  • Scope Questions ('527 Patent): A potential dispute may arise over the scope of the means-plus-function limitations in the '527 patent claims, such as "read control means" and "memory means". The analysis will question whether the specific structures within Defendant's products that perform these functions are the same as, or equivalent to, the corresponding structures disclosed in the patent's specification.
  • Technical Questions ('790 Patent): The infringement analysis for the ’790 Patent will likely focus on the specific operation of the accused products. A key question is whether the accused products generate a signal to a processor that is truly "in response to the quantity of data in the memory", as required by the claim, or if the signaling is triggered by other events or timing mechanisms.

V. Key Claim Terms for Construction

For the '527 Patent:

• The Term: "memory means" (from claim 1)
• Context and Importance: This term appears to be a means-plus-function limitation governed by 35 U.S.C. § 112, ¶ 6 (pre-AIA). Its construction is critical because it will define the scope of the claim not by the word "memory" alone, but by the specific structure disclosed in the specification for performing the recited function (storing a predetermined number of image lines) and its equivalents. The infringement analysis will hinge on whether the accused device's memory architecture is structurally equivalent to what is described in the patent.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The parties may dispute whether the term is in fact a means-plus-function limitation, although the use of "means" creates a presumption that it is.
  • Evidence for a Narrower Interpretation: The specification discloses a specific corresponding structure, memory device 24, which is coupled to a read control device 22 and an output control device 23 (’527 Patent, Fig. 2). The description further specifies its function as storing a particular number of image lines (e.g., "8 lines of image data") to match the block size of the JPEG compression unit (’527 Patent, col. 3:5-8). A court may construe the claim term to be limited to this disclosed structure and its equivalents.

For the '790 Patent:

• The Term: "in response to the quantity of data in the memory" (from claim 1)
• Context and Importance: This phrase is central to the causal mechanism of the invention. It requires that the signal generation be triggered by the amount of data stored, not merely by time or another event. Practitioners may focus on this term because infringement will depend on showing that the accused device's signaling logic is functionally tied to a data fill-level or count.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: A party might argue this language is met so long as the signal is generated after some non-zero quantity of data has been stored.
  • Evidence for a Narrower Interpretation: The specification provides a more specific implementation where an interrupt generator 48 compares a FIFO counter output Sc with a FIFO limit Sₗ and asserts an interrupt signal if the count is greater than or equal to the limit (’790 Patent, col. 6:11-14). This suggests the phrase requires a specific, threshold-based triggering mechanism.

VI. Other Allegations

• Indirect Infringement: For the ’790 and ’242 Patents, the complaint alleges induced infringement. The basis for this allegation is that Defendant allegedly distributes "product literature and website materials" that instruct end users on how to use the accused products in an infringing manner, and sells the products to customers for such use (Compl. ¶¶22-23, ¶¶31-32).
• Willful Infringement: The complaint alleges that the service of the complaint and its attached claim charts provides Defendant with "actual knowledge" of its infringement of the ’790 and ’242 Patents. It alleges that despite this knowledge, Defendant continues to infringe, which may form the basis for a claim of post-suit willful infringement (Compl. ¶¶21-22, ¶¶30-31).

VII. Analyst’s Conclusion: Key Questions for the Case

1. A primary issue will be one of evidence and specificity: Can Plaintiff substantiate its bare-bones allegations with sufficient factual evidence from its non-proffered exhibits to demonstrate that the "Exemplary Defendant Products" practice each and every limitation of the asserted claims? The initial focus will be on the adequacy of the infringement contentions.
2. The case will likely involve a key question of claim construction and function: For the ’790 and ’242 patents, the dispute may turn on the meaning of "in response to the quantity of data in the memory." The court will need to determine if this requires a specific threshold-based triggering mechanism, and fact-finding will then focus on whether the accused products operate in that precise manner.
3. A further central issue will be one of structural equivalence: For the ’527 patent, the infringement analysis will depend on the construction of its means-plus-function terms. The core question for the court will be whether the specific hardware and logic structures in the accused products are legally equivalent to the particular embodiments disclosed in the patent's specification.