DCT

6:22-cv-01305

Cedar Lane Tech Inc v. Via Tech Inc

Key Events
Complaint
complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 6:22-cv-01305, W.D. Tex., 12/28/2022
  • Venue Allegations: Venue is alleged to be proper because the defendant is a foreign corporation, and because it has allegedly committed acts of patent infringement and caused harm within the district.
  • Core Dispute: Plaintiff alleges that certain of Defendant's products infringe patents related to a host interface for managing data transfer between a CMOS imaging array and a processor system.
  • Technical Context: The technology addresses the challenge of efficiently connecting a high-rate image sensor to a general-purpose processor, a fundamental requirement in devices like digital cameras, webcams, and other integrated imaging systems.
  • Key Procedural History: The complaint indicates that U.S. Patent No. 8,537,242 is a divisional of the application that resulted in U.S. Patent No. 6,972,790, establishing a direct lineage. The '242 patent is subject to a terminal disclaimer over the '790 patent. No other significant procedural events are mentioned.

Case Timeline

Date Event
2000-01-21 Earliest Priority Date for '790 Patent and '242 Patent
2000-12-21 Application filed for '790 Patent
2005-10-27 Application filed for '242 Patent
2005-12-06 '790 Patent Issued
2013-09-17 '242 Patent Issued
2022-12-28 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,972,790 - "Host interface for imaging arrays," Issued Dec. 6, 2005

The Invention Explained

  • Problem Addressed: The patent’s background describes a fundamental incompatibility between the "video style output" of conventional IC image sensors and the data interface of commercial microprocessors (Compl. ¶9; ’790 Patent, col. 1:38-44). Image sensors typically output a continuous, synchronized stream of pixel data, whereas processors are designed to access memory at arbitrary times. Bridging this gap required additional "glue logic," which increased system complexity and cost, undermining the primary benefit of CMOS technology—the ability to integrate sensing and processing on a single chip (’790 Patent, col. 1:45-53).
  • The Patented Solution: The invention proposes an on-chip interface to decouple the image sensor's data generation rate from the processor's data access rate (’790 Patent, col. 2:4-14). The interface uses a memory, such as a First-In First-Out (FIFO) buffer, to temporarily store pixel data from the imaging array. When the amount of data in the memory reaches a certain level, a signal generator alerts the processor (e.g., via an interrupt), and a control circuit then manages the transfer of the buffered data to the processor system at a rate the processor dictates (’790 Patent, Abstract; Fig. 2).
  • Technical Importance: This architecture allows a processor to efficiently acquire image data without being locked into the sensor's timing, thereby reducing the need for external components and enabling more cost-effective and highly integrated imaging systems (’790 Patent, col. 1:60-67).

Key Claims at a Glance

  • The complaint does not identify specific claims, instead referencing "Exemplary '790 Patent Claims" in an external exhibit not filed with the complaint (Compl. ¶12). Independent claim 1 is representative of the core invention.
  • The essential elements of independent claim 1 include:
    • An interface for receiving data from an image sensor and transferring it to a processor system, comprising:
    • a memory for storing imaging array data and clocking signals at a rate determined by the clocking signals;
    • a signal generator for generating a signal for transmission to the processor system in response to the quantity of data in the memory; and
    • a circuit for controlling the transfer of the data from the memory at a rate determined by the processor system.
  • The complaint alleges infringement of "one or more claims," reserving the right to assert others, including dependent claims (Compl. ¶12).

U.S. Patent No. 8,537,242 - "Host interface for imaging arrays," Issued Sep. 17, 2013

The Invention Explained

  • Problem Addressed: As a divisional of the '790 patent's application, this patent addresses the same technical problem of reconciling the different data-handling protocols of image sensors and host processors (Compl. ¶10; ’242 Patent, col. 1:11-59).
  • The Patented Solution: The '242 patent claims the method of implementing the technology described in the '790 patent. The claimed process involves receiving and storing image data in a FIFO memory, maintaining a count of the data in that memory, comparing the count against a predefined limit, and, based on that comparison, generating an interrupt to signal a processor to begin transferring the stored data (’242 Patent, Claim 1).
  • Technical Importance: By claiming the operational method, the patent provides a different form of protection for the same core technological concept of using a buffered, interrupt-driven architecture to manage data flow in an integrated imaging system (’242 Patent, col. 1:60-67).

Key Claims at a Glance

  • The complaint does not identify specific claims, instead referencing "Exemplary '242 Patent Claims" in an external exhibit not filed with the complaint (Compl. ¶21). Independent method claim 1 is representative.
  • The essential steps of independent claim 1 include:
    • receiving image data from an imaging array;
    • storing the image data in a FIFO memory;
    • updating a FIFO counter to maintain a count of the image data;
    • comparing the count of the FIFO counter with a FIFO limit;
    • generating an interrupt signal for a processor when the count bears a "predetermined relationship" to the limit; and
    • transferring the image data from the memory to the processor.
  • The complaint alleges infringement of "one or more claims," reserving the right to assert others (Compl. ¶21).

III. The Accused Instrumentality

Product Identification

The complaint does not name any specific accused products, referring to them generally as the "Exemplary Defendant Products" (Compl. ¶12, ¶21). The identification of these products is deferred to claim chart exhibits that were not filed with the complaint (Compl. ¶17, ¶26).

Functionality and Market Context

The complaint does not provide any technical description of the accused products or their specific functionalities. It makes the conclusory allegation that the products "practice the technology claimed" by the patents-in-suit (Compl. ¶17, ¶26). No information regarding the products' commercial importance or market position is provided.

IV. Analysis of Infringement Allegations

The complaint makes only general allegations of infringement, stating that the accused products "satisfy all elements of the Exemplary... Patent Claims" and incorporates by reference external claim chart exhibits (Exhibits 3 and 4) that were not included with the public filing (Compl. ¶17-18, ¶26-27). This precludes a detailed, element-by-element analysis of the plaintiff's infringement theory. No probative visual evidence provided in complaint.

  • Identified Points of Contention:
    • '790 Patent (Apparatus): A central dispute may involve whether the accused products contain structures that meet the functional limitations of the claims. For example, for the "circuit for controlling the transfer of the data," the analysis will question whether the specific hardware and/or software components in the accused products perform the identical function recited in the claim and, if construed as a means-plus-function element, whether they are structurally equivalent to the embodiments disclosed in the patent's specification.
    • '242 Patent (Method): For the method claims, a key evidentiary question will be whether the accused products, in their normal operation, can be shown to perform every claimed step. This includes the specific internal logic of updating a data counter, comparing that count to a "FIFO limit," and generating an interrupt based on a "predetermined relationship" between the two, which may require significant discovery or reverse engineering to prove.

V. Key Claim Terms for Construction

  • The Term: "interface" (from '790 Patent, Claim 1)

    • Context and Importance: This term defines the overall claimed apparatus. Its construction is critical to determining whether the patent covers only single-chip integrated solutions or extends to systems where the sensor and interface logic are on separate chips. Practitioners may focus on this term as it sets the physical boundary of the invention.
    • Evidence for a Broader Interpretation: The claim language itself does not explicitly require the interface to be on the same die as the image sensor, referring generally to "an interface for receiving data from an image sensor" (’790 Patent, col. 8:5-7).
    • Evidence for a Narrower Interpretation: The specification repeatedly highlights the advantages of on-chip integration, stating that a key benefit of CMOS is "the ability to include image-processing elements on the same substrate as the imaging circuitry" and that the "interface is preferably integrated on the same die as the image sensor" (’790 Patent, col. 1:26-30; Abstract). This language may be used to argue that the invention is limited to such integrated embodiments.
  • The Term: "a circuit for controlling the transfer of the data" (from '790 Patent, Claim 1)

    • Context and Importance: This element is the functional core of the interface. Its construction will determine what combination of hardware and software infringes. Practitioners may focus on this term because its phrasing suggests it could be governed by 35 U.S.C. § 112(f) (means-plus-function), which carries specific legal standards for both construction and infringement.
    • Intrinsic Evidence for Interpretation: If treated as a means-plus-function limitation, the term's scope would be restricted to the corresponding structures described in the specification and their equivalents. The patent discloses these structures as including a "Chip Command Decoder (45)," "FIFO Configuration Registers (46)," and "FIFO Read Control (47)" (’790 Patent, Fig. 2; col. 5:46-65). An infringement analysis would then hinge on identifying these specific structures, or their equivalents, in the accused products.
  • The Term: "predetermined relationship" (from '242 Patent, Claim 1)

    • Context and Importance: This term defines the logical trigger for the processor interrupt. The breadth of this term will dictate what type of buffer management schemes fall within the scope of the claim.
    • Intrinsic Evidence for Interpretation: The specification, which is common to both patents, provides a specific example where an "interrupt generator compares the FIFO counter output Sc and the FIFO limit Sₗ. If Sc≥Sₗ... the generator asserts the interrupt signal" (’790 Patent, col. 6:11-15). This may support a narrower interpretation where the "relationship" must be a direct comparison to a programmable threshold, as opposed to a broader interpretation covering any pre-set triggering condition.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges induced infringement for both patents. The factual basis asserted is that the Defendant provides "product literature and website materials" that instruct customers on how to use the accused products in an infringing manner (Compl. ¶15, ¶24).
  • Willful Infringement: The complaint alleges that the service of the complaint and its attached (but un-filed) claim charts provide the Defendant with "actual knowledge" of infringement (Compl. ¶14, ¶23). It further alleges that the Defendant's continued sale of the accused products despite this knowledge constitutes willful infringement, potentially justifying enhanced damages (Compl. ¶15, ¶24). No allegations of pre-suit knowledge are made.

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of claim construction: Can the term "interface," which is described in the patent's specification as "preferably integrated on the same die," be construed broadly enough to cover multi-chip systems, or will it be limited to the single-chip embodiments that the patent lauds as a key advantage of the invention?
  • A key evidentiary question will be one of technical proof: Given the conclusory nature of the complaint, the case will depend on whether the Plaintiff can produce evidence, likely from discovery or technical analysis, demonstrating that the internal architecture and software of the accused products perform the specific data-counting, comparison, and interrupt-generation steps required by the asserted method claims.
  • A central legal question will be the applicability of means-plus-function: The infringement analysis for the '790 patent may turn on whether key claim elements, such as "a circuit for controlling," are construed under 35 U.S.C. § 112(f). An affirmative finding would significantly narrow the scope of the claims to the specific structures disclosed in the patent, raising the bar for proving infringement.