6:23-cv-00309
Intellectual Ventures I LLC v. TCL Electronics Holdings Ltd
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Intellectual Ventures I LLC (Delaware)
- Defendant: TCL Electronics Holdings Ltd. (Cayman Islands) and TCL Industries Holdings Co., Ltd. (China)
- Plaintiff’s Counsel: Sorey & Hoover, LLP; Prince Lobel Tye LLP
- Case Identification: 6:23-cv-00309, W.D. Tex., 04/26/2023
- Venue Allegations: Venue is alleged to be proper because Defendant is a foreign corporation and has committed acts of patent infringement within the district.
- Core Dispute: Plaintiff alleges that Defendant’s smartphones and other devices, which incorporate certain ARM-based processors and Wi-Fi chipsets, infringe patents related to multiple clock domain microprocessor architecture and methods for transmitting wireless signals.
- Technical Context: The technologies at issue are foundational to modern high-performance computing and wireless communications, addressing efficiency in microprocessor clocking and reliability in multi-antenna (MIMO) data transmission.
- Key Procedural History: The complaint alleges that Defendant had knowledge of the asserted patents at least as early as the filing of a separate lawsuit, case 6:23-cv-293, which may form the basis for allegations of willful infringement.
Case Timeline
| Date | Event |
|---|---|
| 2003-01-23 | ’443 Patent Priority Date |
| 2004-05-20 | ’439 Patent Priority Date |
| 2006-08-08 | ’443 Patent Issue Date |
| 2009-11-24 | ’439 Patent Issue Date |
| 2021-01-04 | Announcement Date of Snapdragon 480 5G Chipset |
| 2023-04-26 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,089,443 - MULTIPLE CLOCK DOMAIN MICROPROCESSOR
Issued August 8, 2006
The Invention Explained
- Problem Addressed: As microprocessors increased in frequency and physical size in the early 2000s, distributing a single, perfectly synchronized clock signal across the entire chip became a significant engineering challenge. This "wire delay" and "clock skew" problem limited further increases in processing speed and scalability (Compl. ¶14; ’443 Patent, col. 1:25-45).
- The Patented Solution: The patent proposes a "multiple clock domain" (MCD) microarchitecture, also known as a globally-asynchronous, locally-synchronous (GALS) design. In this system, the microprocessor is divided into several functional blocks, or "domains," each operating with its own independently generated clock and supplied by its own independent voltage source. This allows each part of the chip to run at its own optimal speed and voltage without being constrained by the slowest component, while specialized circuits handle communication between the domains (’443 Patent, Abstract; col. 3:15-24).
- Technical Importance: This architecture provided a path to overcome the physical limitations of global clock distribution, enabling higher processor frequencies, improved scalability, and more granular power management through dynamic voltage and frequency scaling (DVFS) (Compl. ¶35-39).
Key Claims at a Glance
- The complaint asserts at least independent claim 1 (Compl. ¶42).
- The key elements of independent claim 1 include:
- A multiple clock domain microprocessor comprising a plurality of domains.
- For each domain, a clock that separately generates a clock signal at a frequency that is dynamically changeable independent of the other domains' clock frequencies.
- For each domain, a voltage input for receiving a voltage that is dynamically changeable independent of the voltages applied to the other domains.
- Plaintiff reserves the right to assert additional claims (Compl. ¶52).
U.S. Patent No. 7,623,439 - CYCLIC DIVERSITY SYSTEMS AND METHODS
Issued November 24, 2009
The Invention Explained
- Problem Addressed: In wireless systems using multiple antennas to transmit the same data (a technique to improve reliability), signals can interfere with each other. Early methods to solve this, such as delaying one signal, created new problems, including one signal's data spilling into the other's "guard interval" (a buffer zone in the data packet). A subsequent technique, "cyclic-delay diversity," could also cause "unintentional beamforming," where the signal energy is inadvertently misdirected (Compl. ¶20-22).
- The Patented Solution: Instead of delaying a signal, the invention describes a method of "cyclically advancing" it. This involves shifting a portion of the data samples from an Orthogonal Frequency Division Multiplexing (OFDM) packet's main symbol into the preceding guard interval for one of the transmitted signals. This technique is designed to improve the decorrelation between the two transmitted signals, thereby reducing packet error rates and minimizing unintentional beamforming (’439 Patent, Abstract; col. 6:4-13).
- Technical Importance: This method offered an improved way to implement transmit diversity in MIMO-OFDM systems, which are the technological foundation for modern high-speed Wi-Fi standards like 802.11n and its successors (Compl. ¶23-24).
Key Claims at a Glance
- The complaint asserts at least independent claim 1 (Compl. ¶63).
- The key elements of independent claim 1 include:
- A method for transmitting OFDM signals that involves generating a first OFDM packet with a guard interval and a symbol data portion.
- Cyclically advancing the packet by shifting samples in a first direction by an amount less than the guard interval's duration.
- This shift moves a non-zero number of samples from the symbol data portion into the guard interval, and a same number of samples from the original guard interval out of it.
- The original packet and the shifted version are then transmitted substantially simultaneously.
- Plaintiff reserves the right to assert additional claims (Compl. ¶72).
III. The Accused Instrumentality
Product Identification
The accused products include the TCL 30 V 5G smartphone and other TCL devices that incorporate ARM-based processors with similar functionality (for the ’443 Patent) or that support IEEE 802.11n/ac/ax wireless standards (for the ’439 Patent) (Compl. ¶42, ¶63).
Functionality and Market Context
- The complaint alleges that the TCL 30 V 5G smartphone contains a Qualcomm Snapdragon 480 5G chipset, which utilizes an octa-core ARM processor in a big.LITTLE configuration (Compl. ¶44). This processor is alleged to implement ARM's DynamIQ architecture, which provides for multiple, independent clock and voltage domains for its constituent cores and shared logic, enabling dynamic voltage and frequency scaling (DVFS) (Compl. ¶45, ¶47, ¶49).
- The accused products are also alleged to support the IEEE 802.11n wireless standard, which the complaint claims requires a "forward shift diversity feature" when transmitting multiple spatial streams using OFDM (Compl. ¶65).
- The complaint positions Defendant as a major global manufacturer of smartphones and consumer electronics (Compl. ¶4).
IV. Analysis of Infringement Allegations
’443 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| A multiple clock domain microprocessor comprising: a plurality of domains; | The accused processor's ARM DynamIQ architecture comprises multiple domains, such as individual processor cores (e.g., Core 0) and a DynamIQ Shared Unit (DSU). A provided diagram illustrates this cluster of cores and shared logic. (Figure 2-1, Compl. p. 15). | ¶45 | col. 3:15-24 |
| for each of the plurality of domains, a clock for separately generating a clock signal at a frequency for that domain, the frequency being dynamically changeable independently of the frequencies of the clock signals generated for others of the plurality of domains; | The DynamIQ cluster allegedly uses separate clock signals for each core (e.g., CORExCLK) and for the shared logic (SCLK), which can be driven asynchronously and scaled dynamically to meet performance needs. A diagram shows these separate clock domains. (Figure 4-1, Compl. p. 17). | ¶46, ¶47 | col. 4:37-45 |
| and for each of the plurality of domains, a voltage input for receiving a voltage which is dynamically changeable independently of the voltages applied to said others of the plurality of domains. | Each core in the DynamIQ cluster can allegedly be in a separate voltage domain, allowing for independent Dynamic Voltage Frequency Scaling (DVFS) to be applied to each core. A diagram depicts these distinct core voltage domains. (Figure 5-6, Compl. p. 23). | ¶48, ¶49 | col. 4:30-37 |
Identified Points of Contention
- Scope Questions: A central question will be whether the patent's term "domain", illustrated with examples like "integer issue/execute" and "floating point issue/execute" functional blocks, can be construed to read on the accused product's architectural units of a "CPU core" and a "DynamIQ Shared Unit (DSU)."
- Technical Questions: The infringement theory relies on public documentation for ARM's DynamIQ architecture. The litigation may explore whether the accused TCL products, as implemented and sold, actually practice the full, independent dynamic voltage and frequency scaling capabilities described in that documentation, or if their functionality is more restricted.
’439 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| generating a first OFDM packet for transmission including a guard interval portion and a symbol data portion each comprised of a plurality of samples; | The 802.11 transmitter in the accused products is alleged to create OFDM packets that include both a symbol data portion (the main signal) and a preceding guard interval, as illustrated in a diagram of an OFDM frame. (Figure 18-2, Compl. p. 36). | ¶66 | col. 2:10-14 |
| cyclically advancing the first OFDM packet by shifting the samples in a first direction an amount less than a sample duration of the guard interval portion... | The accused products, in complying with the 802.11n standard, allegedly apply a cyclic shift of between -50 ns and -200 ns to certain OFDM symbols, an amount less than the 800 ns guard interval. | ¶67 | col. 6:4-13 |
| ...in which at least a non-zero number of the samples from the symbol data portion...are shifted into the guard interval portion...and a same non-zero number of samples from the guard interval portion...are shifted out...; | The accused products are alleged to perform a cyclic shift that moves samples from the end of the symbol data portion to the beginning of the guard interval, effectively advancing them in time, as illustrated in a diagram showing how a cyclic prefix is formed. (The Cyclic Prefix for OFDM, Compl. p. 46). | ¶68 | col. 6:4-13 |
| and substantially simultaneously transmitting the first OFDM packet and the shifted version of the OFDM packet. | The signals for different spatial streams (one original, one shifted) are allegedly transmitted from different antennas at the same time, as shown in a transmitter block diagram. (Figure 20-2, Compl. p. 48). | ¶69 | col. 1:44-51 |
Identified Points of Contention
- Scope Questions: The case may focus on whether the term "cyclically advancing" as used in the patent is synonymous with the "cyclic shift" described in the IEEE 802.11 standard. The patent emphasizes "advancement" to distinguish from prior art "delay," raising the question of whether the standard's implementation meets this specific claimed functionality.
- Technical Questions: Does the "cyclic shift" implemented in the accused products for 802.11n compliance constitute a shift in the "first direction" that moves samples into the guard interval, as required by the claim? Infringement is predicated on compliance with a standard, and the key factual question will be whether the specific implementation in Defendant's products maps to all limitations of the asserted claim.
V. Key Claim Terms for Construction
’443 Patent, Claim 1
- The Term: "domain"
- Context and Importance: The infringement analysis hinges on mapping the patent's concept of a "domain" onto the physical and logical structures of the accused ARM processor (i.e., "cores" and "DSU"). The breadth of this term's definition will likely determine the outcome of the infringement analysis for this patent.
- Intrinsic Evidence for a Broader Interpretation: The specification describes domains as "functional blocks" that "run relatively independently of one another" (’443 Patent, col. 2:12-14). Plaintiff may argue this supports a broad definition covering any logically separable unit within the processor capable of independent clocking and voltage supply.
- Intrinsic Evidence for a Narrower Interpretation: Figure 1 of the patent illustrates specific domains such as the "front end" (110), "integer issue/execute" (120), and "floating point issue/execute" (130). Defendant may argue that a "domain" must correspond to these types of discrete, major pipeline functions, not simply a processor core which contains many such functions.
’439 Patent, Claim 1
- The Term: "cyclically advancing"
- Context and Importance: Practitioners may focus on this term because the patent appears to use it deliberately to distinguish the invention from prior art "cyclic delay" schemes. The infringement case rests on equating this term with the "cyclic shift" functionality mandated by the 802.11 standard.
- Intrinsic Evidence for a Broader Interpretation: The claim language describes the result of the action: shifting samples "from the symbol data portion... into the guard interval portion." Plaintiff will likely argue that any process achieving this result, regardless of its name in a standard, constitutes "cyclically advancing" as taught by the patent (’439 Patent, Claim 1).
- Intrinsic Evidence for a Narrower Interpretation: The patent repeatedly frames its invention in opposition to "delay" (Compl. ¶60). Defendant may argue that "advancing" requires a specific technical implementation or outcome that is distinct from the more general "cyclic shift" found in the IEEE standard, which can be either a positive (delay) or negative (advance) value.
VI. Other Allegations
Indirect Infringement
The complaint alleges inducement of infringement for both patents. For the ’443 patent, this is based on Defendant allegedly providing products and instructions that cause end-users to operate the infringing multi-domain processors (Compl. ¶51). For the ’439 patent, inducement is based on requiring and advertising compliance with the 802.11 standard, which allegedly mandates the infringing cyclic shift method (Compl. ¶71).
Willful Infringement
The complaint alleges willful infringement based on Defendant's alleged actual knowledge of the patents, purportedly obtained no later than the filing of a prior lawsuit (case 6:23-cv-293), suggesting alleged pre-suit knowledge (Compl. ¶53, ¶73).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of architectural equivalence: For the ’443 patent, can the term "domain", which is rooted in the patent's description of distinct functional pipeline stages, be construed to cover the more complex and integrated "core" and "shared unit" structures of the accused modern ARM processor architecture?
- A second central question will be one of standards-based infringement: For the ’439 patent, does the accused products' implementation of the mandatory "cyclic shift" in the IEEE 802.11n standard meet every element of the patent's "cyclically advancing" claim, or is there a technical or legal distinction between the two that could defeat the infringement allegation?
- A key evidentiary question will be one of proof of implementation: Since the complaint relies heavily on public technical specifications from ARM and the IEEE, the case will likely turn on whether Plaintiff can present sufficient evidence that Defendant's commercial products actually implement the accused features in an infringing manner, as opposed to merely possessing the underlying capability described in the standards documents.