DCT

6:23-cv-00883

Acqis LLC v. Micro Star Intl Co Ltd

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: Acqis LLC v. MICRO-STAR INTERNATIONAL CO., LTD., 6:23-cv-00883, W.D. Tex., 12/22/2023
  • Venue Allegations: Venue is alleged as proper because the foreign defendants do not reside in the United States and may be sued in any judicial district. The complaint also notes that the asserted patents have been previously litigated in this District and that Defendants have utilized businesses within the district for importation purposes.
  • Core Dispute: Plaintiff alleges that Defendant’s computer products, including laptops, desktops, and servers, which are manufactured abroad and imported into the U.S., are made using patented methods related to high-speed serial data transmission over low-voltage differential signal (LVDS) channels.
  • Technical Context: The patents relate to foundational technologies for improving data transfer speeds between computer components, which have become integral to modern standards like PCI Express (PCIe) and Universal Serial Bus (USB).
  • Key Procedural History: The complaint alleges that Plaintiff provided Defendant with actual notice of infringement on or around October 20, 2020. The complaint also notes a prior lawsuit involving related patents resulted in a significant jury verdict against IBM.

Case Timeline

Date Event
1999-05-14 Earliest Priority Date for '**750**, '**797**, **RE45,140**, **RE44,654** Patents
2005-03-31 Priority Date for '**769** Patent
2013-12-17 U.S. Patent No. RE44,654 Issued
2014-09-16 U.S. Patent No. RE45,140 Issued
2015-03-10 U.S. Patent No. **8,977,797** Issued
2016-12-27 U.S. Patent No. **9,529,769** Issued
2017-07-11 U.S. Patent No. **9,703,750** Issued
2018-03-19 Alleged shipment of infringing MSI laptop products to the U.S. begins
2020-10-20 Plaintiff allegedly provides Defendant with actual notice of infringement
2023-12-22 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 9,703,750 - "Computer System Including CPU or Peripheral Bridge Directly Connected to a Low Voltage Differential Signal Channel that Communicates Serial Bits of a Peripheral Component Interconnect Bus Transaction in Opposite Directions"

The Invention Explained

  • Problem Addressed: Traditional computer interconnections, like the Peripheral Component Interconnect (PCI) bus, used parallel data transmission requiring a large number of signal channels and connector pins. This architecture was described as being difficult to adapt for "cable friendly" low-voltage differential signal (LVDS) channels, which consume less power and generate less noise (Compl. ¶40).
  • The Patented Solution: The invention claims methods for manufacturing computer systems that replace bulky parallel connections with high-performance, power-efficient LVDS channels. These channels use pairs of unidirectional serial bit streams to communicate data, such as USB protocol data or digital video data, in opposite directions between a CPU/graphics controller and external peripherals (Compl. ¶49-50; ’750 Patent, Abstract). The specification describes this as an "interconnection system that was scalable, used connectors with low pin counts, was power-efficient, high performing, and easily extendible" (Compl. ¶40).
  • Technical Importance: This approach to serializing bus transactions was foundational to the development of modern high-speed I/O standards like PCI Express and USB 3.x, which allow for faster data rates with fewer physical connections compared to older parallel bus technologies (Compl. ¶50, 53).

Key Claims at a Glance

  • The complaint asserts at least claim 50, an independent method claim (Compl. ¶123).
  • The essential steps of claim 50 include:
    • Obtaining an integrated central processing unit (CPU) and graphics controller in a single chip.
    • Connecting a first unidirectional, differential signal pair channel directly to the integrated CPU to output digital video data.
    • Providing a connector for external peripheral data communication.
    • Providing a first Low Voltage Differential Signal (LVDS) channel to convey Universal Serial Bus (USB) protocol through the connector, using two unidirectional serial bit channels for opposite-direction data transmission.
  • The complaint reserves the right to assert additional claims during discovery (Compl. ¶125).

U.S. Patent No. 8,977,797 - "Method of Improving Peripheral Component Interface Communications Utilizing a Low Voltage Differential Signal Channel"

The Invention Explained

  • Problem Addressed: The patent's background describes limitations in prior art computer systems, such as the difficulty of interfacing notebook PCs with docking stations using high-pin-count connectors for parallel PCI buses. The patent identifies these parallel interfaces as not "cable friendly" and subject to limitations in speed and efficiency (’797 Patent, col. 3:36-54).
  • The Patented Solution: The invention describes a method for improving data throughput by using an LVDS channel to interface computer components. This LVDS channel can use multiple pairs of differential signal lines to transmit encoded PCI bus transaction data in serial form, allowing for scalable, high-speed connections that are more efficient and use fewer pins than traditional parallel buses (’797 Patent, Abstract; col. 4:11-34). The patent explains that this approach allows two computer interface buses to be bridged using a non-PCI-like channel, overcoming the physical limitations of the PCI protocol itself (’797 Patent, col. 6:33-47).
  • Technical Importance: This method of encoding and transmitting bus data over high-speed serial links provided a pathway to overcome the bandwidth and physical connector constraints of parallel bus architectures, a key step toward the development of modern serial interconnects (Compl. ¶52-53).

Key Claims at a Glance

  • The complaint asserts at least claim 36, an independent method claim (Compl. ¶135).
  • The essential steps of claim 36 include:
    • Mounting an integrated CPU and interface controller as a single chip on a motherboard.
    • Connecting an LVDS channel directly to the interface controller, which uses two unidirectional serial channels for opposite-direction data transmission.
    • Increasing data throughput by providing each serial channel with multiple differential signal line pairs.
    • Configuring the interface controller to adapt to different numbers of signal line pairs to convey encoded PCI bus transaction data in serial form.
    • Coupling the integrated CPU and interface controller to a peripheral device, such as a mass storage device, through an LVDS channel.
  • The complaint reserves the right to assert additional claims during discovery (Compl. ¶137).

U.S. Patent No. 9,529,769 - "Computer System Including CPU or Peripheral Bridge Directly Connected to a Low Voltage Differential Signal Channel that Communicates Serial Bits of a Peripheral Component Interconnect Bus Transaction In Opposite Directions"

  • Technology Synopsis: This patent claims methods for improving external peripheral data communication in a computer. The method involves using an integrated CPU and graphics controller, a connector for external peripherals, and multiple LVDS channels to convey both USB protocol data and digital video data using unidirectional serial bit channels (Compl. ¶149).
  • Asserted Claims: At least independent claim 19 (Compl. ¶149).
  • Accused Features: The accused features include the manufacturing process for MSI laptops and desktops, which allegedly involves using integrated Intel processors with direct connections to DDI, PCIe, Thunderbolt, and USB 3.x ports that function as the claimed LVDS channels to transmit video and USB data (Compl. ¶149, 152).

U.S. Patent No. RE45,140 - "Data Security Method and Device for Computer Modules"

  • Technology Synopsis: This patent claims methods for improving the performance of a computer during its manufacture. The method involves obtaining an integrated CPU and graphics controller and connecting LVDS channels directly to it for transmitting data in opposite directions, as well as connecting a separate differential signal channel for outputting digital video data (Compl. ¶160).
  • Asserted Claims: At least independent claim 35 (Compl. ¶160).
  • Accused Features: The complaint alleges that the manufacturing of MSI laptops and desktops infringes by using integrated Intel processors that directly connect to PCIe, DMI, and USB 3.x channels (as the LVDS channels) and separate DDI/PCIe channels (as the differential signal channel for video) (Compl. ¶160, 163).

U.S. Patent No. RE44,654 - "Data Security Method and Device for Computer Modules"

  • Technology Synopsis: This patent claims methods of increasing the data communication speed of a computer by directly connecting a CPU to a peripheral bridge on a circuit board. The method further includes connecting LVDS channels directly to this peripheral bridge to transmit data, including USB protocol data, to an external console via a connector (Compl. ¶172).
  • Asserted Claims: At least independent claim 23 (Compl. ¶172).
  • Accused Features: The accused features are the manufacturing processes for MSI products, which allegedly connect an Intel CPU directly to the Platform Controller Hub (PCH) (the peripheral bridge) via a DMI connection, with the PCH then connecting to external USB 3.x and Thunderbolt ports (the LVDS channels) (Compl. ¶172, 175, 178).

III. The Accused Instrumentality

Product Identification

  • The "Accused MSI Products" include specified models of MSI-branded laptops, desktops, and servers, with the MSI GT75 TITAN 4K-247 laptop serving as a primary illustrative example (Compl. ¶63-66, 70).

Functionality and Market Context

  • The complaint focuses on the internal architecture of the accused products, alleging they are built around Intel Core series processors (e.g., 9th Generation Core i9) that integrate a CPU, graphics subsystem, and interface controller on a single chip (Compl. ¶72-74). A central allegation is that these processors connect directly to various high-speed serial interfaces, including PCIe, SATA, DMI, USB 3.x, and DisplayPort, which allegedly function as the LVDS channels claimed in the patents (Compl. ¶76). The complaint contains a processor platform diagram highlighting the direct connections between the processor, the Platform Controller Hub (PCH), and these various I/O channels (Compl. p. 25, Fig. 1-1). MSI is positioned as a "global leader in the personal, gaming, and business computer markets" whose U.S. sales generate billions of dollars in revenue (Compl. ¶60-61).

IV. Analysis of Infringement Allegations

U.S. Patent No. 9,703,750 Infringement Allegations

Claim Element (from Independent Claim 50) Alleged Infringing Functionality Complaint Citation Patent Citation
a method of manufacturing a computer, comprising...obtaining an integrated central processing unit (CPU) and graphics controller in a single chip... MSI manufactures the GT75 laptop using a 9th Generation Intel® Core™ i9 processor, which integrates the CPU and graphics on a single chip. ¶123(b) Not Provided
connecting a first unidirectional, differential signal pair channel directly to the integrated CPU and graphics controller to output digital video data... MSI connects DDI channels and/or PCIe channels from the Intel processor to output digital video. ¶123(c) Not Provided
providing a connector for external peripheral data communication of the computer... The MSI GT75 includes various external ports, such as USB 3.x and Thunderbolt ports. ¶123(d) Not Provided
providing a first Low Voltage Differential Signal (LVDS) channel to convey Universal Serial Bus (USB) protocol through the connector, the first LVDS channel comprising two unidirectional, serial bit channels that transmit data in opposite directions... The MSI GT75 provides USB 3.x channels which are alleged to be LVDS channels that use two unidirectional serial bit channels to transmit USB protocol data in opposite directions. ¶123(e) Not Provided

U.S. Patent No. 8,977,797 Infringement Allegations

Claim Element (from Independent Claim 36) Alleged Infringing Functionality Complaint Citation Patent Citation
a method of improving data throughput on a motherboard, comprising...mounting an integrated central processing unit (CPU) and interface controller as a single chip on the motherboard... During manufacture, MSI mounts an Intel processor, which integrates a CPU and interface controllers for DMI/PCIe channels, as a single chip onto the motherboard. ¶135(b) col. 8:15-20
connecting a Low Voltage Differential Signal (LVDS) channel directly to an interface controller integrated with the CPU, which LVDS channel uses two unidirectional, serial channels to transmit data in opposite directions... The MSI GT75 has PCIe and DMI interfaces, which are alleged to be LVDS channels, directly connected to the interface controller integrated within the Intel processor. ¶135(c) col. 6:33-47
increasing data throughput in the serial channels by providing each channel with multiple differential signal line pairs... The PCIe and DMI channels in the MSI GT75 have multiple pairs of differential signal lanes. ¶135(d) col. 6:29-32
configuring the interface controller to adapt to different numbers of differential signal line pairs to convey encoded address and data bits of a Peripheral Component Interconnect (PCI) bus transaction in serial form... The interface controller in the Intel processor is configured to convey PCIe data signals (which are alleged to be encoded PCI bus transactions) through PCIe channels having differential signal line pairs. ¶135(e) col. 6:40-47
coupling the integrated CPU and interface device to a peripheral device such as a mass storage device, which is attached to the motherboard through a PCIe or other LVDS channel. The integrated CPU is coupled to a mass storage device via a PCIe or other LVDS channel. ¶135(f) col. 8:21-25

Identified Points of Contention

  • Scope Questions: A primary issue may be whether modern serial interconnect standards like PCIe 3.0, DMI 3.0, and USB 3.x, which were developed after the patents' 1999 priority date, fall within the claimed scope of a "Low Voltage Differential Signal (LVDS) channel." The physical layer diagram for PCI Express shows circuitry for parallel-to-serial conversion, which may support the allegation that it is a type of LVDS channel (Compl. p. 20). The defense may argue these are distinct, later-developed technologies not contemplated by the patent.
  • Technical Questions: The analysis will likely focus on whether the connections in the accused products meet the "directly" connected/coupled limitations in the claims. For example, claim 36 of the '797 patent requires "connecting an LVDS channel directly to an interface controller integrated with the CPU." The defense may argue that intervening circuitry or logical layers between the processor die and the physical ports preclude a finding of a "direct" connection as understood by one of skill in the art at the time of the invention.

V. Key Claim Terms for Construction

The Term: "Low Voltage Differential Signal (LVDS) channel"

  • Context and Importance: This term is central to the dispute, as the complaint alleges that numerous modern, standardized interfaces (PCIe, USB 3.x, DMI, SATA) are infringing "LVDS channels." The definition of this term will determine whether the patents' scope is broad enough to cover technologies that were not explicitly named in the specification. Practitioners may focus on this term because its construction will either limit the claims to the specific bus architectures disclosed or allow them to read on a wide range of modern computer products.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The '797 patent specification states, "The term LVDS is herein used to generically refer to low voltage differential signals and is not intended to be limited to any particular type of LVDS technology" (’797 Patent, col. 4:4-7). This language may support a broad, functional definition not limited to specific named standards.
    • Evidence for a Narrower Interpretation: The patent frequently discusses the invention in the context of replacing parallel PCI buses with a specific serial bus architecture, referred to as the "XPBus" and "XIS Bus" (e.g., ’797 Patent, FIG. 6; col. 6:33-37). A defendant may argue that the term "LVDS channel" should be construed in light of these specific disclosed embodiments.

The Term: "directly" (as in "directly connected" or "directly coupled")

  • Context and Importance: Multiple asserted claims require a component (e.g., a CPU) to be "directly" connected to another (e.g., a peripheral bridge or LVDS channel). Given the complexity of modern integrated circuits and motherboards, the presence of any intervening components, logic, or physical layers could be a point of non-infringement. The definition of "directly" will be critical to determining if the physical and logical architecture of the accused Intel processors meets this limitation.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The complaint's diagrams show a direct logical path on architectural block diagrams between the CPU/PCH and various I/O ports, which Plaintiff may argue satisfies a "direct" connection in a functional sense (Compl. p. 25, Fig. 1-1). The patent may describe connections in a similarly high-level, functional manner.
    • Evidence for a Narrower Interpretation: The patent's detailed description may disclose embodiments where "directly connected" implies an immediate physical or electrical connection without intervening logic, which could support a narrower construction. A defendant may argue that chipsets, controllers, or other logic between the CPU core and an external port break the "direct" connection required by the claims.

VI. Other Allegations

Indirect Infringement

  • The complaint's infringement theory is primarily centered on direct infringement under 35 U.S.C. § 271(g), which holds that importing, offering to sell, or selling within the U.S. a product made abroad by a process patented in the U.S. constitutes direct infringement (Compl. ¶62, 121, 133). The complaint does not plead specific facts to support claims of induced or contributory infringement.

Willful Infringement

  • The complaint alleges that Plaintiff provided MSI with actual notice of the asserted patents and its infringement on or around October 20, 2020 (Compl. ¶116). This allegation of pre-suit knowledge may form the basis for a claim of willful infringement for any infringing conduct occurring after that date.

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of temporal scope and construction: Can the term "LVDS channel," as defined in a patent family with a 1999 priority date, be construed to cover modern, standardized serial interfaces like PCIe 3.0 and USB 3.x, which were developed and adopted by the industry years after the patent was filed? The outcome will depend on whether the term is interpreted functionally or is limited to the specific technologies known at the time of the invention.
  • A second key issue will be one of technical and factual infringement: Does the architecture of the accused MSI products, particularly the connections between the integrated Intel CPU/PCH and the various I/O ports, satisfy the claims' requirement of a "direct" connection? This will likely be a battle of experts focusing on the precise physical and logical pathways within the accused devices.
  • A third question will be one of process infringement: Can Plaintiff present sufficient evidence to demonstrate that the specific manufacturing and assembly steps performed abroad by or for MSI practice all the steps of the asserted method claims? This will shift the focus from the final product's operation to the details of its fabrication process.