DCT

6:25-cv-00581

Bayerische Motoren Werke Aktiengesellschaft v. Onesta IP LLC

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Key Events
Complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 6:25-cv-00581, W.D. Tex., 12/15/2025
  • Venue Allegations: Plaintiff BMW alleges venue is proper because Defendant Onesta has purposefully directed patent enforcement activities toward entities in the district, including filing other patent lawsuits, and is therefore subject to personal jurisdiction and "resides" in the district for venue purposes.
  • Core Dispute: Plaintiff BMW AG seeks a declaratory judgment that it does not infringe, and that Defendant Onesta IP's patents are invalid and have been misused, in response to Onesta's assertion of the same U.S. patents against BMW AG in a German court.
  • Technical Context: The patents-in-suit relate to efficiency and power management in multi-core processors and graphics processing units (GPUs), technologies that are fundamental to the operation of modern automotive infotainment, navigation, and driver-assistance systems.
  • Key Procedural History: This action follows Onesta's filing of a lawsuit in Munich, Germany, alleging that BMW AG's vehicles infringe the two U.S. patents-in-suit. The complaint also details a significant litigation history involving the ’381 Patent, including prior U.S. International Trade Commission (ITC) investigations and an inter partes review (IPR) proceeding. In one ITC investigation, an Administrative Law Judge issued an initial determination finding certain claims of the ’381 Patent invalid. In the IPR, the Patent Trial and Appeal Board (PTAB) instituted trial after finding a "reasonable likelihood" that certain claims were unpatentable, though the proceeding was later terminated due to a settlement.

Case Timeline

Date Event
2009-07-24 U.S. Patent No. 8,443,209 Priority Date
2009-09-03 U.S. Patent No. 8,854,381 Priority Date
2013-05-14 U.S. Patent No. 8,443,209 Issued
2014-10-07 U.S. Patent No. 8,854,381 Issued
2023-03-07 IPR Petition filed against ’381 Patent
2023-10-25 PTAB institutes IPR on claims of ’381 Patent
2024-06-26 PTAB terminates IPR on ’381 Patent due to settlement
2024-11-08 Approximate date of ’381 Patent assignment from AMD to Onesta
2025-04-17 Onesta files related W.D. Tex. litigations asserting ’381 Patent
2025-04-18 Onesta files related ITC complaint asserting ’381 Patent
2025-10-09 Onesta files suit against BMW AG in Germany
2025-12-15 Complaint for Declaratory Judgment filed by BMW AG

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 8,854,381 - *"Processing unit that enables asynchronous task dispatch"*

  • Issued: October 7, 2014 (Compl. ¶38)

The Invention Explained

  • Problem Addressed: The patent's background describes the inefficiency of conventional Graphics Processing Units (GPUs) when handling high-priority, low-latency tasks. When such a task arrives, the GPU must perform a "context switch" to interrupt its current, longer-running task. This process requires a substantial amount of time and additional on-chip memory to save and restore the state of the interrupted task, limiting the GPU's performance and responsiveness. (’381 Patent, col. 2:1-58).
  • The Patented Solution: The invention proposes a processing unit architecture with multiple "virtual engines" that can receive tasks in parallel from an operating system scheduler. These engines feed a shared "shader core" that is configured to execute multiple tasks—such as a low-latency task and a standard graphics task—"substantially in parallel" or "substantially simultaneously" without needing a conventional, time-consuming context switch. (’381 Patent, Abstract; col. 9:59-62). This allows the GPU to handle mixed workloads more efficiently.
  • Technical Importance: This architectural approach aims to make GPUs more versatile, enabling them to efficiently manage both standard data-parallel workloads and time-sensitive tasks, a capability increasingly important in complex real-time systems. (Compl. ¶113).

Key Claims at a Glance

  • The complaint focuses its non-infringement analysis on independent claim 1. (Compl. ¶114).
  • Essential elements of Claim 1 (Apparatus):
    • A plurality of engines associated with a first processing unit, configured to receive a plurality of tasks from a scheduling module and to load state data for each task.
    • A shader core associated with the first processing unit.
    • The shader core is configured to receive the tasks from the engines and "to execute a first task from the plurality of tasks while executing a second task from the plurality of tasks based on respective state data associated with each of the first and second tasks."
  • The complaint notes that Onesta asserted claims 1-6 and 15-20 in the related German litigation and BMW reserves its right to address all asserted claims. (Compl. ¶113).

U.S. Patent No. 8,443,209 - *"Throttling computational units according to performance sensitivity"*

  • Issued: May 14, 2013 (Compl. ¶39)

The Invention Explained

  • Problem Addressed: In multi-core systems, different computational tasks respond differently to changes in processor frequency. Some tasks see significant performance gains from a frequency boost, while others see very little. Uniformly boosting all active cores is inefficient and can waste power from the system's limited thermal budget on tasks that do not benefit. (’209 Patent, col. 2:36-44).
  • The Patented Solution: The patent describes a method for more intelligent power allocation. The system first accesses data indicating the "performance sensitivity" of each computational unit to a change in its performance capability (e.g., frequency). It then identifies a subset of units that are the "least sensitive" to such a change and limits their performance (i.e., throttles them). This conserves power, creating headroom that can be reallocated to the more performance-sensitive units, thereby improving overall system efficiency. (’209 Patent, Abstract; col.2:45-51).
  • Technical Importance: This method provides a dynamic and granular approach to power management, aiming to maximize computational performance within a fixed power or thermal envelope, a critical challenge in mobile and embedded systems like those in modern vehicles. (Compl. ¶123).

Key Claims at a Glance

  • The complaint focuses its non-infringement analysis on independent claim 1. (Compl. ¶124).
  • Essential elements of Claim 1 (Method):
    • Accessing performance data indicative of performance sensitivity of each of a plurality of computational units to a change in performance capability.
    • Determining a subset of one or more computational units that are least sensitive to the change in performance capability based on the performance data.
    • Limiting performance of that determined subset of computational units.
  • The complaint notes that Onesta asserted claims 1, 5-6, 8, 10, 11, 13, and 15-18 in the German litigation and BMW reserves its right to address all asserted claims. (Compl. ¶123).

III. The Accused Instrumentality

Product Identification

  • The complaint identifies the accused instrumentalities as BMW vehicles, specifically citing the BMW i4, that are equipped with a Qualcomm Snapdragon System-on-Chip (SoC). (Compl. ¶¶113, 123). The specific component identified is the "Head Unit High 5 (HU-H5)," which allegedly uses the "Qualcomm Snapdragon SoC SA8155P with integrated Adreno 640" GPU. (Compl. ¶¶113, 123).

Functionality and Market Context

  • The complaint alleges that these Qualcomm SoCs are used in BMW's automotive systems. (Compl. ¶42). Such components are typically central to a vehicle's infotainment, navigation, and advanced driver-assistance functions. (Compl. ¶26). The complaint does not provide further technical detail on the operation of these components, instead focusing on denying that their operation meets the patent claim limitations. (Compl. ¶¶117, 127).

IV. Analysis of Infringement Allegations

As this is a complaint for declaratory judgment of non-infringement, the following tables summarize BMW's asserted basis for why its products do not infringe, rather than a patentee's allegations of infringement.

’381 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a plurality of engines associated with a first processing unit and configured to receive...a plurality of tasks and to load state data associated with each of the plurality of tasks Functionality not detailed; non-infringement not based on this element. ¶114 col. 13:54-60
a shader core...configured to receive the plurality of tasks from at least one of the plurality of engines and... Functionality not detailed; non-infringement not based on this element. ¶114 col. 13:61-63
to execute a first task from the plurality of tasks while executing a second task from the plurality of tasks based on respective state data associated with each of the first and second tasks BMW alleges its products do not contain a shader core that performs this function. ¶117 col. 13:63 - col. 14:2

’209 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
accessing performance data indicative of performance sensitivity of each of a plurality of computational units...to a change in performance capability BMW alleges its products do not access or comprise data indicative of performance sensitivity as required. ¶127 col. 10:59-64
determining a subset of one or more of the computational units...that are least sensitive to the change in performance capability based on the performance data BMW alleges its products do not determine a subset of units based on their sensitivity as required. ¶127 col. 10:65 - col. 11:2
limiting performance of the subset of the plurality of computational units in the computer system BMW alleges its products do not limit performance of the specifically determined subset as required. ¶127 col. 11:3-5
  • Identified Points of Contention:
    • Scope Questions (’381 Patent): The central dispute appears to be the meaning of executing two tasks "while executing" each other. The analysis may focus on whether this requires true, simultaneous, parallel instruction processing within the shader core, or if it can be read more broadly to cover other advanced forms of multitasking that do not constitute a conventional "context switch."
    • Technical Questions (’209 Patent): The infringement analysis will likely turn on the specific operational logic of the Qualcomm SoC's power management system. Key questions include: What specific metrics does the SoC use to manage power? Do these metrics constitute "performance sensitivity" as contemplated by the patent? Does the system's algorithm specifically identify and throttle the "least sensitive" units, or does it employ a different methodology for power allocation? The complaint suggests a fundamental mismatch in the method performed. (Compl. ¶127).
    • Visual Evidence for Invalidity: To support its invalidity arguments for the ’381 Patent, the complaint provides Figure 1 from the Stuttard prior art reference, described as showing a graphics system with functional units that allegedly teach the preamble of Claim 1. (Compl. ¶137, p. 21). For the ’209 Patent, the complaint includes Figure 8 from the Ghiasi prior art reference, which is a flowchart described as illustrating a power management operation that allegedly anticipates elements of Claim 1. (Compl. ¶153, p. 41).

V. Key Claim Terms for Construction

  • The Term: "execute a first task... while executing a second task" (’381 Patent, Claim 1)

    • Context and Importance: This phrase is the core of the claimed invention and the primary basis for BMW's non-infringement argument. (Compl. ¶117). Its construction will determine whether the accused Adreno GPU's method of handling multiple task streams falls within the claim's scope.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification uses phrases like "substantially in parallel" and "(substantially) simultaneously," which may suggest that something less than strict, cycle-for-cycle parallel execution could be covered. (’381 Patent, Abstract; col. 9:61-62).
      • Evidence for a Narrower Interpretation: The patent repeatedly distinguishes its solution from prior art "context switching." (Compl. ¶381 Patent, col. 2:21-58). This framing could support an interpretation requiring a specific hardware architecture that enables concurrent execution without the operational steps of a traditional context switch, potentially narrowing the claim scope.

  • The Term: "performance sensitivity" (’209 Patent, Claim 1)

    • Context and Importance: The entire claimed method is predicated on accessing data "indicative of performance sensitivity." BMW's non-infringement defense hinges on its argument that the accused products do not access or use such data. (Compl. ¶127). The definition of this term is therefore central to the dispute.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The claim language is functional, requiring only that the data be "indicative of" sensitivity to a change in "performance capability." A patentee may argue this covers any metric that correlates performance output with a change in an input like frequency or voltage.
      • Evidence for a Narrower Interpretation: The specification discloses a specific method for determining this value, called "boost sensitivity," which involves measuring instructions-per-cycle at low and high frequencies and calculating the difference. (’209 Patent, col. 4:19-49). An accused infringer may argue that this detailed example limits the claim term to this specific type of measurement, and that other power management metrics (e.g., those based on thermal load or unit utilization alone) do not qualify.

VI. Other Allegations

  • Patent Misuse: The complaint asserts two primary theories of patent misuse. First, it alleges that Onesta is improperly attempting to enforce its U.S. patents in a German court to take advantage of different procedural rules and to seek damages beyond the six-year limitation provided by U.S. law. (Compl. ¶¶43-48, 53-54). Second, it alleges an anticompetitive scheme between Onesta and the original patent assignee, Advanced Micro Devices, Inc. (AMD), to assert the patents against AMD's competitors (Qualcomm and NVIDIA) and their customers, like BMW. (Compl. ¶¶62-69, 99-106).
  • Indirect Infringement: The complaint seeks a declaratory judgment that BMW has not infringed "directly or indirectly, literally or under the doctrine of equivalents." (Compl. ¶¶115, 125). It does not, however, detail the specific factual basis for any potential indirect infringement allegations.
  • Willful Infringement: Willful infringement is not alleged, as this is a declaratory judgment action filed by the accused infringer.

VII. Analyst’s Conclusion: Key Questions for the Case

  • A threshold legal question will be one of enforceability: Can a U.S. patent holder's decision to assert its U.S. patents against a party in a foreign court, allegedly to circumvent U.S. statutory limitations and procedural norms, constitute patent misuse sufficient to render the patents unenforceable in the United States?
  • A core issue for the ’381 Patent will be one of architectural scope: Does the claim term "execute a first task... while executing a second task" require a specific form of true parallel processing within a single shader core, or can it be construed to cover the advanced multitasking capabilities of the accused Adreno GPU? The outcome will depend on whether the accused product's operation is fundamentally different from the "asynchronous task dispatch" architecture described in the patent.
  • A key evidentiary question for the ’209 Patent will be one of methodological equivalence: Does the power management algorithm in the accused Qualcomm SoC perform the specific three-step method of Claim 1—accessing "performance sensitivity" data, determining the "least sensitive" subset, and then throttling that subset—or does it achieve power management through a technically distinct, non-infringing process?