DCT

7:24-cv-00245

Advanced Cluster Systems Inc v. Intel Corp

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 7:24-cv-00245, W.D. Tex., 01/22/2025
  • Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Defendant Intel maintains regular and established places of business in Austin, commits acts of alleged infringement in the district, and employs a substantial number of personnel with relevant knowledge in the district.
  • Core Dispute: Plaintiff alleges that Defendant’s high-performance processors and AI accelerators, including the Xeon and Gaudi product lines, infringe five patents related to cluster computing architectures.
  • Technical Context: The technology concerns methods for enabling software applications to run in parallel across multiple processors or computers in a cluster, aiming to provide supercomputing-level performance for mainstream software.
  • Key Procedural History: The complaint does not reference prior litigation or post-grant validity challenges involving the patents-in-suit. All five asserted patents claim priority from the same 2006 provisional application, indicating they belong to a single, long-prosecuted family of inventions.

Case Timeline

Date Event
2006-06-13 Earliest Priority Date for all Patents-in-Suit
2019-06-25 U.S. Patent No. 10,333,768 Issues
2019-06 (approx.) Alleged First Infringement by Intel Xeon (Skylake-SP) & Habana Labs Products
2019-12 (approx.) Intel Announces Acquisition of Habana Labs, Ltd.
2023-01-24 U.S. Patent No. 11,563,621 Issues
2023-01-31 U.S. Patent No. 11,570,034 Issues
2023-11-07 U.S. Patent No. 11,811,582 Issues
2024-06-25 U.S. Patent No. 12,021,679 Issues
2025-01-22 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 10,333,768, "Cluster Computing," issued June 25, 2019

The Invention Explained

  • Problem Addressed: The patent’s background states that many software applications are not designed to benefit from computer clusters, as they are coded to run on a single processor or "node." It identifies prior art "grid computing" solutions as using a limiting master-slave architecture where computational "slave" nodes can only communicate with a "master" node, not with each other directly, which is inefficient for tasks requiring data sharing during computation (Compl. ¶¶33-34; ’768 Patent, col. 1:21-63).
  • The Patented Solution: The invention introduces a software architecture, centered on a "cluster node module," that enables multiple single-node software "kernels" (e.g., interpreters for high-level programming languages) to communicate with each other in a peer-to-peer fashion across a cluster. This module intercepts instructions and manages inter-node communication, allowing an application not originally designed for parallel execution to leverage the power of a multi-node cluster (’768 Patent, Abstract; col. 2:5-17, col. 5:49 - col. 6:38). The complaint reproduces Figure 2 of the patent to illustrate this peer-to-peer, or mesh, communication structure (Compl. ¶35).
  • Technical Importance: This approach is presented as a method to make "supercomputer-like performance" available to applications written in high-level languages by creating a framework for parallel processing that is more flexible and efficient than prior master-slave models (’768 Patent, col. 2:7-14).

Key Claims at a Glance

  • The complaint asserts independent claims 1 and 35 (Compl. ¶55).
  • Independent Claim 1 recites a computer cluster with a plurality of nodes, each with a hardware processor, that includes:
    • A mechanism for the nodes to communicate results using a "peer-to-peer architecture."
    • A first node with a user interface and a first "single-node kernel" configured to interpret instructions and distribute calls to other nodes.
    • A second node configured to receive calls from the first, perform a first mathematical evaluation, and communicate the result to a third node.
    • A third node configured to receive the result from the second node, perform a second mathematical evaluation using that result, and communicate its result back to the first node.
    • The first node is further configured to return the final result to the user interface.
    • The nodes are configured to accept user instructions and communicate them among each other and to one or more single-node kernels.

U.S. Patent No. 11,563,621, "Cluster Computing," issued January 24, 2023

The Invention Explained

  • Problem Addressed: The ’621 Patent, part of the same family as the '768 patent, addresses the same technical problem: enabling software designed for a single computer to effectively use the parallel processing capabilities of a multi-node computer cluster and overcoming the limitations of master-slave grid computing architectures (’621 Patent, col. 1:15-65).
  • The Patented Solution: The solution is substantively identical to that of the ’768 Patent, describing a system of "cluster node modules" that facilitate direct, peer-to-peer communication among distinct software "kernels" running on different nodes. This allows for parallel computation where intermediate results can be shared directly between any nodes in the cluster (’621 Patent, Abstract; col. 2:5-17; Fig. 2).
  • Technical Importance: As with the ’768 Patent, the technical contribution is described as a framework that makes high-performance, parallel computing accessible to mainstream, high-level software applications that were not originally designed for it (’621 Patent, col. 2:10-14).

Key Claims at a Glance

  • The complaint asserts independent claim 1 (Compl. ¶63).
  • Independent Claim 1 recites a computer cluster with first, second, and third processors, which includes:
    • First, second, and third "kernels," each residing on a computer-readable medium and configured to translate commands for its respective processor.
    • A first "cluster node module" that receives commands from a user interface and sends them to the first kernel.
    • Second and third "cluster node modules" that send commands to their respective kernels and are configured to communicate with the first cluster node module and each other.
    • The claim specifies that the modules can transmit tasks to any other module "without transmitting the tasks through a master node."
    • The first cluster node module comprises a data structure for storing messages originating from the second and third modules.

U.S. Patent No. 11,570,034, "Cluster Computing," issued January 31, 2023

  • Technology Synopsis: This patent, from the same family, describes a system that allows software kernels, originally designed for single-node operation, to function in a parallel, multi-node cluster. It achieves this through "cluster node modules" that enable direct peer-to-peer communication between kernels, bypassing the limitations of traditional master-slave architectures (Compl. ¶¶33-35).
  • Asserted Claims: Independent claims 1 and 30 (Compl. ¶71).
  • Accused Features: The complaint alleges infringement by the Accused Habana Server Products, Accused Habana AI Accelerator Products, and Accused Xeon Products (Compl. ¶69).

U.S. Patent No. 11,811,582, "Cluster Computing," issued November 7, 2023

  • Technology Synopsis: As a member of the same patent family, this patent discloses a framework for parallelizing single-node software applications across a computer cluster. The core technology involves "cluster node modules" that manage peer-to-peer communication between software kernels on different hardware nodes, thereby enabling more efficient parallel processing than master-slave models (Compl. ¶¶33-35).
  • Asserted Claims: Independent claim 1 (Compl. ¶79).
  • Accused Features: Infringement is alleged against the Accused Habana Server Products, Accused Habana AI Accelerator Products, and Accused Xeon Products (Compl. ¶77).

U.S. Patent No. 12,021,679, "Cluster Computing," issued June 25, 2024

  • Technology Synopsis: This patent also belongs to the asserted family and is directed to systems and methods for cluster computing. It describes using "cluster node modules" to create a peer-to-peer communication layer among otherwise independent software kernels, allowing them to collaborate on computational tasks across a multi-node hardware cluster (Compl. ¶¶33-35).
  • Asserted Claims: Independent claim 1 (Compl. ¶87).
  • Accused Features: Infringement is alleged against the Accused Habana Server Products, Accused Habana AI Accelerator Products, and Accused Xeon Products (Compl. ¶85).

III. The Accused Instrumentality

  • Product Identification: The accused instrumentalities are Intel’s Xeon Scalable Processors (from Skylake-SP architecture to the 6th generation), Habana AI accelerator products (Gaudi, Gaudi 2, Gaudi 3, Goya), and server and workstation products incorporating these components (Compl. ¶¶47-50).
  • Functionality and Market Context: The complaint alleges these products are high-performance computing components designed for use in multi-processor servers, data centers, and AI training systems (Compl. ¶¶44, 47, 49). Their function is to be interconnected to form computer clusters capable of executing computationally intensive tasks in parallel. The complaint asserts that these products, when configured in servers and clusters, implement an advanced, parallel mesh computing framework that enables supercomputing-level performance, aligning with the stated purpose of the patented inventions (Compl. ¶35).

IV. Analysis of Infringement Allegations

The complaint references claim chart exhibits that are not provided; therefore, the infringement allegations are summarized below in narrative form.

  • Narrative Infringement Summary: The central infringement theory is that Intel's accused processors and accelerators, when assembled into multi-node servers or clusters, embody the patented "computer cluster" systems. The complaint alleges that these hardware configurations function as the claimed "nodes" and utilize a "peer-to-peer architecture" for communication, as opposed to a master-slave model (Compl. ¶¶33-35). This architecture allegedly enables different processing units (the accused equivalent of the claimed "kernels") to communicate directly with one another to perform parallel computations. The complaint reproduces Figure 2 from the patents-in-suit to visually represent this alleged mesh communication architecture, asserting that the accused products provide for such intercommunication to address complex scientific and mathematical problems (Compl. ¶35). The complaint alleges that Intel’s products are used to build systems that practice the claimed methods and systems of the patents-in-suit (Compl. ¶8).
  • Identified Points of Contention:
    • Architectural Questions: A primary question may be whether the patents' software-centric architecture—which describes "cluster node modules" managing communication for "single-node kernels"—can be mapped onto the hardware and system software architecture of Intel's accused products. The patents appear focused on a software layer that adapts existing single-node applications, whereas the complaint accuses the fundamental hardware components of infringement.
    • Technical Questions: The complaint alleges that the accused products enable peer-to-peer communication, but provides limited detail on the specific mechanism. A point of contention may be whether the communication protocols and system software used with Intel’s hardware actually perform the specific functions recited in the claims, such as a "cluster node module" that intercepts commands from a "user interface" before they reach a "kernel" (as recited in claim 1 of the ’621 Patent).

V. Key Claim Terms for Construction

  • The Term: "cluster node module"

    • Context and Importance: This term appears to be the central novel component of the claimed system. Its construction will be critical to determining whether Intel's products contain an infringing structure. Practitioners may focus on whether this term is limited to a specific software implementation that adapts a pre-existing "kernel" or can be read more broadly to cover any hardware or software component that manages inter-processor communication in a cluster.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification describes the term’s function broadly, stating it is "configured to communicate with the single-node kernel and other cluster node modules" (’768 Patent, col. 2:61-63).
      • Evidence for a Narrower Interpretation: The patent frequently discusses the module in the specific context of adapting Mathematica software and its "kernel" and "Front End" (’768 Patent, col. 2:13-17). An embodiment in Figure 3 depicts the module as a distinct software entity containing an "MPI module" and an "Advanced functions module" (’768 Patent, Fig. 3).

  • The Term: "single-node kernel"

    • Context and Importance: The invention is framed as a solution for parallelizing applications that use a "single-node kernel." The definition of this term will be essential for determining if the software processes running on Intel’s multi-core processors and accelerators meet this claim limitation.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The patent provides a functional definition of a "kernel" as an "interpreter that executes instructions provided to the program by a user, a script, or another source" (’768 Patent, col. 1:30-32).
      • Evidence for a Narrower Interpretation: The specification consistently uses "Mathematica® from Wolfram Research, Inc." as the primary example of a software package that includes a kernel designed to communicate with a single node (’768 Patent, col. 1:39-44).

  • The Term: "peer-to-peer architecture"

    • Context and Importance: This term is used to distinguish the invention from prior art "master-slave" systems. The infringement case hinges on demonstrating that the accused Intel clusters operate under such an architecture.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The patent describes the result of this architecture, stating that "communications can occur between any two or more cluster node modules ... and not just between 'adjacent' kernels" (’768 Patent, col. 6:11-14).
      • Evidence for a Narrower Interpretation: The patent’s primary contrast is with "grid computing" where "slave nodes communicated only with the master node" (Compl. ¶34; ’768 Patent, col. 1:56-63). Figure 2 illustrates a fully connected mesh, which could be argued to represent the intended scope of the term.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges induced infringement against Intel. The basis for this allegation is that Intel provides "marketing materials, technical specifications, whitepapers, datasheets, user manuals, and development and testing information" that allegedly instruct and encourage customers and partners to build and use the accused products in an infringing manner. The complaint also points to the "Intel AI Partner ecosystem" as a mechanism for inducement (Compl. ¶¶55, 63, 71, 79, 87).
  • Willful Infringement: Willfulness is alleged based on Intel’s awareness of the patents-in-suit "at least as of the filing date of this Complaint." The complaint asserts that any continued infringement after this date is deliberate and willful (Compl. ¶¶54, 62, 70, 78, 86).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A central issue will be one of architectural mapping: Can the patents' claims, which describe a specific software-layer architecture involving "cluster node modules" and "kernels" to adapt single-node applications, be shown to read on the hardware-level architecture and system software of Intel's general-purpose high-performance computing products?
  • A key question will be one of definitional scope: Will the term "single-node kernel," which is primarily exemplified in the patents by the specific Mathematica software interpreter, be construed broadly enough to cover the diverse software processes and threads that execute on Intel's accused processors and AI accelerators?
  • An evidentiary question will concern functional operation: Beyond enabling parallel processing generally, what evidence will show that Intel's products implement the specific peer-to-peer communication pathways and command-handling logic recited in the asserted claims, such as a module that intercepts user interface commands before they reach a processor's execution core?