InnoMemory LLC v. National Instruments Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Organized in Texas, principal place of business in New York)
  • Defendant: National Instruments Corporation (Organized in Delaware, established place of business in Texas)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 7:25-cv-00044, W.D. Tex., Filed 02/02/2025
• Venue Allegations: Venue is alleged to be proper in the Western District of Texas because the Defendant maintains an established place of business in the district and has allegedly committed acts of patent infringement there.
• Core Dispute: Plaintiff alleges that Defendant’s products infringe a patent related to methods for reducing power consumption in memory devices by selectively refreshing only portions of a memory array.
• Technical Context: The technology addresses power management in semiconductor memory (e.g., DRAM), a critical factor for extending battery life in mobile and portable electronic devices.
• Key Procedural History: The patent-in-suit is a continuation of an earlier U.S. application that issued as U.S. Patent No. 6,618,314, a fact that may be relevant for determining the effective priority date and analyzing the prosecution history.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations, issued June 6, 2006

The Invention Explained

• Problem Addressed: The patent's background describes a problem with conventional dynamic random access memories (DRAMs) used in battery-powered devices. These memories must periodically refresh their data cells to prevent data loss, a process that consumes power. Conventional systems often refresh the entire memory array, or, even when refreshing only a portion, still activate power-consuming support circuitry for all sections of the array, leading to inefficient power use in standby modes (U.S. Patent No. 7,057,960, col. 1:36-56; col. 2:24-29).
• The Patented Solution: The invention proposes a system and method to reduce this power consumption by dividing the memory array into multiple sections. The core innovation is a control circuit that can independently manage background operations, such as refresh, for each section. This allows the system to activate the power-hungry "periphery array circuits" only for the specific sections being refreshed, while leaving the circuits for all other sections disabled, thereby saving power (’960 Patent, Abstract; col. 3:25-33). This control is illustrated in figures showing a control circuit (102) providing distinct control signals (REF0-REFn) to a memory array (104) (’960 Patent, FIG. 2).
• Technical Importance: This approach provides a more granular method for power management during memory refresh, which was important for improving the continuous standby time of mobile devices like portable telephones (’960 Patent, col. 1:40-47).

Key Claims at a Glance

• The complaint alleges infringement of "one or more claims" and refers to "Exemplary '960 Patent Claims" in an exhibit not provided with the complaint (Compl. ¶11). Independent claim 1 is representative of the asserted technology.
• Independent Claim 1 (Method) includes the following essential elements:
  • A method for reducing power consumption in a memory array having a plurality of sections.
  • Controlling background operations in each section in response to one or more control signals.
  • The control signals are generated in response to a "programmable address signal."
  • Background operations can be enabled simultaneously in two or more sections, independently of any other section.
  • Presenting the control signals and decoded address signals to "periphery array circuits" of the sections.
• The complaint's reference to "one or more claims" suggests the right to assert additional independent or dependent claims is preserved (Compl. ¶11).

III. The Accused Instrumentality

Product Identification

The complaint does not identify any specific accused products by name. It refers generally to "Exemplary Defendant Products" that are purportedly identified in an external document, Exhibit 2, which was not filed with the complaint (Compl. ¶11, ¶13).

Functionality and Market Context

The complaint does not provide sufficient detail for an analysis of the accused instrumentality's specific functionality or market position. It alleges in general terms that Defendant has made, used, sold, or imported infringing products (Compl. ¶11).

IV. Analysis of Infringement Allegations

The complaint alleges direct infringement but does not provide claim charts in the body of the document; instead, it incorporates them by reference to an unfiled Exhibit 2 (Compl. ¶13-14). The narrative infringement theory is limited to the conclusory statement that "the Exemplary Defendant Products practice the technology claimed by the '960 Patent" and "satisfy all elements of the Exemplary '960 Patent Claims" (Compl. ¶13).

No probative visual evidence provided in complaint.

Identified Points of Contention

• Evidentiary Question: The primary point of contention will be factual. The complaint lacks specific factual allegations linking any particular National Instruments product feature to the elements of the asserted claims. A key question for the court will be whether the plaintiff can produce evidence demonstrating that an accused product contains a memory array with distinct "sections," associated "periphery array circuits," and a control mechanism that selectively disables those circuits based on a "programmable address signal" to save power during background operations.
• Scope Questions: A potential dispute may arise over the scope of "background operations." While the patent focuses on refresh operations and mentions parity checking, the breadth of this term could be contested if the accused products perform other types of low-power state management (’960 Patent, Claims 2, 4). Further, a question may arise as to whether the accused devices' memory architecture maps onto the patent's "plurality of sections" and associated "periphery array circuits."

V. Key Claim Terms for Construction

• The Term: "programmable address signal" (from Claim 1)

  • Context and Importance: The "programmable" nature of this signal is central to the invention's claimed flexibility over prior art. Infringement will likely depend on whether the mechanism used in the accused products to select memory portions for partial refresh qualifies as being responsive to a "programmable address signal."
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent states that the portion of the array to be refreshed "may be controlled by information (e.g., a block address) stored in a refresh address register" (’960 Patent, col. 8:1-5). Plaintiff may argue this supports a broad definition covering any software-configurable setting or register that dictates which memory areas are active.
    • Evidence for a Narrower Interpretation: The specification's primary embodiment shows a dedicated "refresh address register" (138) that latches a "refresh block address" (AR1) to generate control signals (’960 Patent, FIG. 3; col. 4:56-61). Defendant may argue this limits the term to a specific hardware register programmed for this purpose, not a general-purpose software flag.

• The Term: "periphery array circuits" (from Claim 1)

  • Context and Importance: The core power-saving claim of the invention rests on selectively enabling and disabling these specific circuits. The definition of this term will determine what components in an accused device must be shown to be independently controlled.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: Claim 5 provides a non-exhaustive list of such circuits, stating they "comprise one or more circuits from the group consisting of sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits" (’960 Patent, col. 8:63-67). This "comprising" language may support an interpretation that includes these circuits as well as other unnamed support circuitry.
    • Evidence for a Narrower Interpretation: Figure 5 provides a detailed diagram of these circuits, showing a specific arrangement of a wordline driver circuit (160), equalization circuit (162), sense amplifiers (164), and a column select multiplexer circuit (166) (’960 Patent, FIG. 5). Defendant may argue that the term requires the presence and independent control of this specific collection of circuit types as disclosed in the preferred embodiment.

VI. Other Allegations

• Indirect Infringement: The complaint does not include a formal count for indirect or induced infringement and provides no factual allegations regarding Defendant's knowledge or intent to encourage infringement by others (Compl. ¶10-12).
• Willful Infringement: The complaint does not contain an allegation of willful infringement or facts to support it, such as pre-suit knowledge of the patent. The prayer for relief requests that the case be declared "exceptional" under 35 U.S.C. § 285, which relates to attorney's fees, but does not explicitly plead willfulness for the purpose of enhanced damages under § 284 (Compl., Prayer for Relief ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

• A primary issue will be evidentiary. The complaint's lack of specificity places the burden on the plaintiff to produce discovery-based evidence that maps the architecture of an accused National Instruments product onto the patent's claims, specifically demonstrating the independent control of "periphery array circuits" for distinct memory "sections."
• The case may also turn on a key question of claim construction: can the term "programmable address signal," which is described in the context of a dedicated hardware register, be construed broadly enough to read on modern, potentially software-driven, power management techniques used in the accused products? The answer will likely define the scope of infringement.