InnoMemory LLC v. Pinnacle Bank

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: Pinnacle Bank (Texas)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 7:25-cv-00045, W.D. Tex., 02/02/2025
• Venue Allegations: Venue is alleged to be proper based on the Defendant maintaining an established place of business within the Western District of Texas.
• Core Dispute: Plaintiff alleges that Defendant infringes a patent related to methods and architectures for reducing power consumption in memory devices through selective refresh operations.
• Technical Context: The technology concerns power-saving techniques for dynamic random-access memory (DRAM), a critical consideration for improving battery life and energy efficiency in electronic devices.
• Key Procedural History: The asserted patent is a continuation of a prior U.S. patent application. The complaint notes that the patent was originally assigned to Cypress Semiconductor Corp. and has since been assigned to Plaintiff InnoMemory, LLC.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - "Method and architecture for reducing the power consumption for memory devices in refresh operations"

• Patent Identification: U.S. Patent No. 7,057,960, "Method and architecture for reducing the power consumption for memory devices in refresh operations," issued June 6, 2006.

The Invention Explained

• Problem Addressed: The patent addresses the problem of significant standby power consumption in conventional dynamic semiconductor memory devices ('960 Patent, col. 1:49-56). In applications where only a portion of the memory needs to be maintained (e.g., in a battery-powered mobile device's standby mode), conventional systems were inefficient because they either refreshed all memory cells or, even in partial-refresh modes, activated the power-consuming support circuits for all memory sections, not just those being actively refreshed ('960 Patent, col. 2:25-31).
• The Patented Solution: The invention proposes a method and architecture where a memory array is divided into multiple sections. The system can then selectively perform "background operations," such as data refresh, on a subset of these sections based on a programmable address signal ('960 Patent, col. 2:36-44). Crucially, the invention enables the peripheral support circuitry (e.g., sense amplifiers, drivers) for only the sections being refreshed, while leaving the circuitry for other sections inactive, thereby reducing overall power draw ('960 Patent, col. 2:51-55; Fig. 3).
• Technical Importance: This selective activation approach provides a mechanism to lower standby power consumption in memory devices, a key technical challenge for improving the continuous standby time of battery-powered portable electronics ('960 Patent, col. 1:32-35).

Key Claims at a Glance

• The complaint does not specify which claims of the '960 Patent it asserts, referring generally to the "Exemplary '960 Patent Claims" (Compl. ¶11). The analysis below uses independent method Claim 1 as a representative example.
• The essential elements of independent Claim 1 include:
  • controlling background operations in each of a plurality of sections of a memory array in response to one or more control signals;
  • wherein the control signals are generated in response to a programmable address signal;
  • wherein the background operations can be enabled simultaneously in two or more of the sections independently of any other section; and
  • presenting the control signals and decoded address signals to one or more periphery array circuits of the sections.
• The complaint does not explicitly reserve the right to assert dependent claims, but infringement is alleged for "one or more claims" (Compl. ¶11).

III. The Accused Instrumentality

Product Identification

The complaint does not identify any accused products, methods, or services by name. It refers to them generically as the "Exemplary Defendant Products" that are purportedly identified in an exhibit not filed with the complaint (Compl. ¶11, ¶13).

Functionality and Market Context

The complaint alleges that these unidentified products "practice the technology claimed by the '960 Patent" but provides no specific technical details regarding their architecture or operation (Compl. ¶13). The complaint makes no allegations regarding the commercial importance or market positioning of the accused instrumentalities.

IV. Analysis of Infringement Allegations

The complaint incorporates its infringement theory by reference to a claim chart exhibit that was not filed with the public complaint (Compl. ¶13-14). The complaint alleges that this exhibit, "Exhibit 2," compares the asserted claims to the "Exemplary Defendant Products" and demonstrates that the products "satisfy all elements" of those claims (Compl. ¶13). Without this exhibit, a detailed analysis of the infringement allegations is not possible based on the provided documents.

No probative visual evidence provided in complaint.

Identified Points of Contention

• Evidentiary Questions: The central issue will be evidentiary. The complaint does not specify what products used by the Defendant, a bank, are accused of infringement. A threshold question will be whether discovery reveals that any of the Defendant's systems or components possess the specific memory architecture described in the patent.
• Technical Questions: A likely point of dispute will be whether the Defendant's systems, likely composed of standard commercial hardware, implement the granular control claimed in the patent. This raises the question of whether the accused systems have distinct memory "sections" with corresponding "periphery array circuits" that can be independently enabled or disabled in the manner required by the claims ('960 Patent, col. 9:16-20).

V. Key Claim Terms for Construction

The Term: "background operations" (Claim 1)

• Context and Importance: The definition of this term is critical as it defines the scope of activities covered by the patent. Infringement requires that the accused products perform such an operation. Practitioners may focus on this term to determine if the accused activity falls within the patent's scope.
• Intrinsic Evidence for a Broader Interpretation: The specification states that the invention can be used to control "background memory access operations and/or housekeeping operations," and gives "parity checking" as an example in addition to memory refresh ('960 Patent, col. 8:21-24).
• Intrinsic Evidence for a Narrower Interpretation: The patent’s title, abstract, and background section consistently and repeatedly frame the invention in the context of "refresh operations," which could support an argument that this is the term’s primary and limiting meaning ('960 Patent, Title; Abstract; col. 1:11-14).

The Term: "programmable address signal" (Claim 1)

• Context and Importance: This signal is the input that controls which sections are selected for the "background operation." Its definition is key to determining whether the accused systems have the required controllability.
• Intrinsic Evidence for a Broader Interpretation: The term itself suggests any address signal that can be programmed, which a party could argue covers any memory address or region selection that is configurable through software or firmware.
• Intrinsic Evidence for a Narrower Interpretation: The specification's preferred embodiment describes this signal in the context of a "refresh address register" that stores a "block address" used to generate control signals ('960 Patent, col. 8:1-3; Fig. 3, element 138). A party may argue the term should be construed as limited to such a register-based implementation.

The Term: "independently of any other section" (Claim 1)

• Context and Importance: This limitation defines the required degree of separability and control over the memory sections, a key feature distinguishing the invention from prior art. The ability to enable operations in certain sections without regard to others is central to the infringement analysis.
• Intrinsic Evidence for a Broader Interpretation: This could be interpreted functionally to mean that the system logic allows for any combination of sections to be selected, without a predetermined or fixed relationship between them.
• Intrinsic Evidence for a Narrower Interpretation: The detailed circuit diagrams could support a more structural interpretation, requiring that the control pathways for each section are physically and electrically distinct, such that enabling one imposes no operational constraints on another ('960 Patent, Fig. 5-6).

VI. Other Allegations

Willful Infringement

The complaint does not contain an explicit allegation of willful infringement. However, in its prayer for relief, it requests a judgment that the case be declared "exceptional" and seeks an award of attorneys' fees under 35 U.S.C. § 285, which may suggest an intent to later pursue arguments based on willfulness or litigation misconduct (Compl. p. 4, ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

• A primary issue in this case is one of identification and applicability: can the Plaintiff, through discovery, identify specific computer systems or components used by the Defendant—a bank, not a technology manufacturer—and demonstrate that these systems implement the specific, low-level memory architecture required by the '960 patent's claims? The case may depend on whether the accused instrumentalities are merely commodity hardware that lacks the claimed features.
• The case will also present a core question of evidentiary mapping: assuming an accused product is identified, can the Plaintiff prove that its operation maps onto the patent's claim limitations? For instance, does the product perform a "background operation" controlled by a "programmable address signal" that enables activity in multiple memory sections "independently of any other section," or is there a fundamental mismatch in technical operation?
• Finally, should the case proceed, a key legal question will be one of definitional scope: the dispute will likely focus on the construction of key claim terms. The outcome may turn on whether terms like "background operation" and "programmable address signal" are given a broad, functional interpretation or a narrower construction tied to the specific embodiments disclosed in the patent's specification.