7:25-cv-00273
Ascale Tech LLC v. Intel Corp
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Ascale Technologies LLC (Texas)
- Defendant: Intel Corporation (Delaware)
- Plaintiff’s Counsel: The Mort Law Firm, PLLC; Fabricant LLP
- Case Identification: 7:25-cv-00273, W.D. Tex., 06/16/2025
- Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Defendant is registered to do business in Texas, has transacted business in the district, has committed alleged acts of infringement in the district, and maintains a regular and established place of business in Austin, Texas.
- Core Dispute: Plaintiff alleges that Defendant’s microprocessors, FPGAs, and photonic integrated circuits infringe five patents related to power management, thermal compensation for memory, processor thread scheduling, optical interconnects for stacked die, and dynamic voltage scaling.
- Technical Context: The technologies at issue address fundamental challenges in modern semiconductor design, including power efficiency, performance optimization, and high-bandwidth data transfer, which are critical in markets ranging from mobile devices to high-performance computing and AI infrastructure.
- Key Procedural History: The complaint alleges Defendant had knowledge of the patents-in-suit due to its status as a direct competitor to Freescale Semiconductor, Inc., the original assignee of several of the asserted patents. This historical competitive context is asserted as a basis for willful infringement.
Case Timeline
| Date | Event |
|---|---|
| 2006-02-13 | ’266 Patent Priority Date |
| 2006-02-27 | ’991 Patent Priority Date |
| 2008-01-22 | ’165 Patent Priority Date |
| 2009-02-10 | ’266 Patent Issue Date |
| 2010-03-08 | ’136 Patent Priority Date |
| 2011-05-31 | ’991 Patent Issue Date |
| 2013-01-01 | Approximate launch of Intel 4th Gen Core Processors ("Haswell") with FIVR |
| 2013-06-10 | ’135 Patent Priority Date |
| 2014-05-27 | ’165 Patent Issue Date |
| 2014-06-24 | ’136 Patent Issue Date |
| 2015-07-28 | ’135 Patent Issue Date |
| 2024-06-26 | Intel demonstrates its first fully integrated optical I/O chiplet |
| 2025-06-16 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,490,266 - “Integrated Circuit and Processing System with Improved Power Source Monitoring and Methods For Use Therewith”
The Invention Explained
- Problem Addressed: The patent’s background section describes that an interruption in a power source, such as from a low battery or disconnection, can cause portable electronic devices to “hang-up, crash or otherwise malfunction” (’266 Patent, col. 1:29-34).
- The Patented Solution: The invention provides a system with a dedicated on-chip hardware power monitor circuit that detects an error condition in the power source (e.g., low voltage) and, in response, powers down the system components in a predictable and organized fashion to prevent malfunction (’266 Patent, Abstract; col. 2:16-41). This hardware monitor can operate during system power-up before a more sophisticated software-based monitor becomes active (’266 Patent, col. 5:6-12).
- Technical Importance: This approach provides a robust, built-in mechanism for gracefully handling power faults in battery-operated devices, enhancing system reliability without relying solely on software or complex external components (Compl. ¶12).
Key Claims at a Glance
- The complaint asserts independent method claim 23 (Compl. ¶22).
- The essential elements of claim 23 are:
- powering up a power source in response to a user event to thereby provide power to a processing module of an integrated circuit;
- monitoring the power source using an on-chip power monitor circuit of the integrated circuit; and
- powering down the power source and the processing module from the on-chip power monitor circuit when a first error condition is detected in the power source.
U.S. Patent No. 7,953,991 - “Processing System and Methods for use Therewith”
The Invention Explained
- Problem Addressed: The patent addresses the need for memory devices in handheld electronics to operate reliably over a wide range of environmental temperatures (’991 Patent, col. 1:31-38).
- The Patented Solution: The invention describes a method for temperature compensation in a processing system. A controller module receives a temperature signal and compares it against two thresholds defining a nominal operating range. If the temperature falls below the lower threshold or rises above the upper threshold, the system increases the voltage supplied to the memory module to maintain performance and stability (’991 Patent, Abstract; col. 4:32-41). Within the nominal range, the voltage is maintained at a current level (’991 Patent, col. 4:40-41).
- Technical Importance: This method allows integrated circuits, particularly those with volatile memory, to maintain stable operation across a broad temperature range, which is critical for devices deployed in diverse real-world conditions (Compl. ¶13).
Key Claims at a Glance
- The complaint asserts independent method claim 13 (Compl. ¶33).
- The essential elements of claim 13 are:
- receiving a temperature signal;
- making a first comparison between the temperature signal and a first temperature threshold;
- making a second comparison between the temperature signal and a second temperature threshold that is greater than the first temperature threshold;
- adjusting a source voltage to a memory module... by increasing the source voltage when the temperature signal indicates that a temperature is either below the first temperature threshold or above the second temperature threshold; and
- maintaining the source voltage at a current level when the temperature signal indicates that the temperature of the memory module is between the first and second temperature thresholds.
U.S. Patent No. 8,739,165 - “Shared Resource Based Thread Scheduling with Affinity and/or Selectable Criteria”
Technology Synopsis
The patent addresses the challenge of efficiently scheduling software threads on multi-core processors that share resources like caches (’165 Patent, col. 1:11-16). The solution is a method that determines where to execute a thread based on its "affinity" for a particular core (e.g., how much of its data is already in that core's cache) and a selectable system-level goal, such as minimizing power consumption or maximizing performance (’165 Patent, Abstract).
Asserted Claims
The complaint asserts at least independent method claim 1 (Compl. ¶46).
Accused Features
The complaint alleges that Intel’s Core Processors featuring "Intel Thread Director" technology infringe the ’165 Patent by performing thread scheduling based on selectable performance or efficiency modes (Compl. ¶¶ 45, 50).
U.S. Patent No. 9,094,135 - “Die Stack with Optical TSVs”
Technology Synopsis
The patent addresses the power and bandwidth limitations of electrical interconnects in stacked semiconductor die systems (’135 Patent, col. 1:52-64). The invention describes an optical communication system where a single laser source on a first die generates an unmodulated light beam, which is then distributed via optical routing structures (such as waveguides and mirrors) to modulators located on other dies in the stack, allowing for high-bandwidth, low-power communication (’135 Patent, Abstract).
Asserted Claims
The complaint asserts at least independent method claim 13 (Compl. ¶58).
Accused Features
The complaint accuses Intel Photonic Integrated Circuits (PIC) and its Optical Compute Interconnect (OCI) products of infringement. These products allegedly integrate on-chip lasers (e.g., on an Indium Phosphide die) and transmit light to silicon modulators on a receiving die via waveguides (Compl. ¶¶ 57, 59-61).
U.S. Patent No. 8,760,136 - “Dynamic Voltage Scaling Interface”
Technology Synopsis
The patent addresses latency issues in dynamic voltage scaling (DVS) systems, where processor voltage is adjusted to match workload demands (’136 Patent, col. 1:11-20). The patented solution is a method for controlling a power supply by monitoring a DVS signal, assessing for how long the signal remains in a particular state by counting clock edges, and then providing a real-time adjustment signal to the power supply based on that time assessment (’136 Patent, Abstract; col. 4:10-18).
Asserted Claims
The complaint asserts at least independent method claim 1 (Compl. ¶69).
Accused Features
The complaint accuses Intel products implementing dynamic voltage and frequency scaling (DVFS), such as the 12th Generation Core i7-12700K processor, of infringement. These products allegedly monitor a DVS signal associated with a work point and assess time in that state by measuring a "gear ratio" based on clock cycles (Compl. ¶¶ 68-73).
III. The Accused Instrumentality
Product Identification
The complaint names several categories of Intel products, including: Intel Core Processors with Fully Integrated Voltage Regulators (FIVR); Intel Agilex 5 FPGA and SoC FPGA Series; 12th, 13th, and 14th Generation Intel Core Processors with Intel Thread Director; and Intel Photonic Integrated Circuits (PIC) and Optical Compute Interconnect (OCI) products (Compl. ¶18).
Functionality and Market Context
- Intel FIVR Technology: The complaint alleges that Intel’s FIVR technology, integrated into processors such as the 4th Generation "Haswell" Core line, manages power delivery to different domains on the processor die (Compl. ¶23). It includes an on-chip Power Control Unit (PCU) that monitors voltage and other parameters and can shut down if the input voltage is outside of the normal operating range (Compl. ¶¶ 24-25). A diagram in the complaint illustrates how FIVR integrates multiple voltage regulators onto the processor package/die, simplifying platform design (Compl. p. 9, "Fully Integrated Voltage Regulator (FIVR)").
- Intel Agilex 5 Series: The complaint alleges that Intel’s Agilex 5 FPGAs contain on-chip voltage and temperature sensors (Compl. ¶34). A feature called "SmartVID," managed by the Secure Device Manager (SDM) subsystem, allegedly performs "dynamic voltage adjustment" to compensate for performance degradation at different temperatures by checking for sensor changes and updating voltage if a threshold is crossed (Compl. ¶35).
- The complaint alleges these technologies are commercially significant, with FIVR enabling "a 50% or more increase in battery life for mobile products" and Thread Director supplying "the behind-the-scenes magic that maximizes hybrid performance" in modern processors (Compl. p. 8; p. 24).
IV. Analysis of Infringement Allegations
’266 Patent Infringement Allegations
| Claim Element (from Independent Claim 23) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| powering up a power source in response to a user event to thereby provide power to a processing module of an integrated circuit | Intel microprocessors with FIVR include integrated voltage regulators that manage power delivery to processor cores (processing modules), which are powered up to operate. | ¶23 | col. 6:35-39 |
| monitoring the power source using an on-chip power monitor circuit of the integrated circuit | The on-chip Power Control Unit (PCU) in Intel microprocessors with FIVR receives data from monitors that continuously oversee the power source, including voltage levels, current draw, and temperature. | ¶24 | col. 2:16-18 |
| powering down the power source and the processing module from the on-chip power monitor circuit when a first error condition is detected in the power source | Voltage regulators in Intel microprocessors with FIVR are alleged to shut down if the detected input voltage is outside the normal range, which constitutes the first error condition and the powering down. | ¶25 | col. 2:18-20 |
Identified Points of Contention
- Scope Questions: A central question may be the scope of the phrase "powering down... from the on-chip power monitor circuit." The complaint alleges that an automatic under-voltage lockout (UVLO) feature, where the regulator shuts down if input voltage is outside a normal range, satisfies this element (Compl. ¶25). The defense may argue that this is a simple hardware protection trip, distinct from the more orderly, sequenced shutdown described in the patent specification, which contemplates powering down modules in an "organized fashion" to "avoid malfunction or other hang-up" (’266 Patent, col. 2:38-41).
- Technical Questions: The complaint does not specify what constitutes the "user event" that initiates the "powering up" step. The analysis will depend on evidence showing how the accused FIVR systems are activated in practice.
’991 Patent Infringement Allegations
| Claim Element (from Independent Claim 13) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| receiving a temperature signal | Intel Agilex 5 Series devices have "on-chip voltage and temperature sensors." A diagram shows a local temperature sensor system with multiple analog-to-digital converters feeding a Secure Device Manager (SDM) (Compl. p. 16, "Agilex 5 FPGAs Local Temperature Sensor"). | ¶34 | col. 3:9-10 |
| making a first comparison between the temperature signal and a first temperature threshold | Agilex 5 devices are alleged to increase voltage to maintain performance at a "given specific colder temperature (first temperature threshold)." The SDM Power Manager allegedly checks for changes and updates voltage if the temperature crosses a threshold. | ¶35 | col. 4:32-34 |
| making a second comparison between the temperature signal and a second temperature threshold that is greater than the first temperature threshold | Agilex 5 devices are alleged to maintain device performance by "comparison with a hot temperature (second temperature threshold)." The SDM Power Manager allegedly checks for temperature changes when the temperature crosses a threshold point. | ¶36 | col. 4:35-38 |
| adjusting a source voltage... by increasing the source voltage when the temperature signal indicates that a temperature is either below the first temperature threshold or above the second temperature threshold | The complaint alleges that in Agilex 5 devices, "dynamic voltage adjustment" occurs if the temperature changes by a certain amount. The complaint cites a chart to support this allegation. | ¶37 | col. 4:55-63 |
| maintaining the source voltage at a current level when the temperature signal indicates that the temperature of the memory module is between the first and second temperature thresholds | The complaint alleges that in Agilex 5 devices, "dynamic voltage adjustment does not occur" if the temperature remains within a specified range. | ¶38 | col. 5:1-3 |
Identified Points of Contention
- Technical Questions: A significant question arises from the evidence presented for the "increasing the source voltage... above the second temperature threshold" limitation. The asserted claim requires voltage to increase at both cold and hot temperature extremes. However, the primary visual evidence cited in the complaint to support this allegation, Figure 19, depicts a voltage ("VID Value") that decreases as temperature rises from a moderate to a hot range (Compl. p. 18). This presents a potential contradiction between the claim's requirement and the functionality shown in the complaint's own exhibit, raising a fundamental question about the factual basis for infringement of this claim element.
V. Key Claim Terms for Construction
’266 Patent, Claim 23
- The Term: "powering down the power source and the processing module from the on-chip power monitor circuit"
- Context and Importance: The case may turn on whether an automated hardware protection feature, like an under-voltage lockout, is encompassed by this phrase. Practitioners may focus on this term because it links the shutdown action directly to the monitor circuit, and its construction will determine if a simple fault trip infringes or if a more complex, managed shutdown is required.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself does not specify the manner of the powering down, only that it is initiated "from" the monitor circuit in response to a detected error. Plaintiff may argue that any shutdown caused by the monitor meets this language.
- Evidence for a Narrower Interpretation: The specification describes powering down the processing module and memory module "in an organized fashion, in an attempt to avoid malfunction" (’266 Patent, col. 2:38-40) and suggests delaying the shutdown of the power source to allow sufficient time for this process (’266 Patent, col. 2:31-37). This may support an interpretation that requires a controlled, sequential shutdown rather than an instantaneous trip.
’991 Patent, Claim 13
- The Term: "increasing the source voltage when the temperature signal indicates that a temperature is... above the second temperature threshold"
- Context and Importance: This term is critical because the infringement allegation requires the accused product to raise voltage at high temperatures. As noted in Section IV, the complaint's own evidence appears to show the opposite behavior. The construction of "increasing" will be central to resolving this apparent contradiction.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent specification supports this language directly, stating that controller module 28 "increases the target voltage by a second function when the temperature signal compares unfavorably to the second temperature threshold, such as during a higher than normal temperature condition" (’991 Patent, col. 4:38-42). Figures 10-14 consistently depict the voltage rising as temperature increases above threshold Tₐ.
- Evidence for a Narrower Interpretation: The defense may argue that this term must be read in the context of the entire system described and that the accused product achieves thermal stability through a different mechanism that does not meet this limitation. However, the intrinsic evidence strongly supports a plain meaning of raising the voltage level at high temperatures.
VI. Other Allegations
Indirect Infringement
For all asserted patents, the complaint alleges induced infringement under 35 U.S.C. § 271(b), stating that Defendant provides customers with accused products along with "instructions, documentation, technical support, marketing, product manuals, advertisements, and online documentation" that encourage infringing use (e.g., Compl. ¶¶ 27, 40, 52, 63, 75). The complaint also alleges contributory infringement under § 271(c), asserting that the accused components are material to the inventions, are not staple articles of commerce, and are known by Defendant to be especially adapted for infringement (e.g., Compl. ¶¶ 28, 41, 53, 64, 76).
Willful Infringement
The complaint alleges willful infringement based on pre-suit knowledge of the patents. The asserted basis for this knowledge is Defendant's status as a "direct competitor to Freescale Semiconductor," its alleged monitoring of Freescale's patent portfolio, and its hiring of former Freescale employees (Compl. ¶17). The complaint further alleges willful blindness, claiming Defendant has a "policy or practice of not reviewing the patents of others" to deliberately avoid knowledge of infringement (Compl. ¶17).
VII. Analyst’s Conclusion: Key Questions for the Case
This case presents infringement allegations across a diverse set of five semiconductor technologies. The litigation will likely focus on several central questions for the court's determination:
- A core issue will be one of definitional scope: For the ’266 patent on power management, can the claim term “powering down... from the on-chip power monitor circuit” be construed to cover a standard hardware under-voltage protection feature, or does the patent require a more sophisticated, managed shutdown sequence?
- A key evidentiary question will be one of factual contradiction: For the ’991 patent on thermal compensation, does the accused Intel Agilex 5 product actually perform the claimed function of "increasing the source voltage" at high temperatures? The complaint alleges it does, but the primary visual evidence provided appears to show the opposite, creating a fundamental dispute over the technical operation of the accused device.
- A central strategic question will be one of portfolio breadth: Given the assertion of five patents spanning disparate fields from thread scheduling to optical physics, the case will test whether Plaintiff can establish infringement across this wide technological range or if the dispute will narrow to the one or two patents where the factual and legal arguments for infringement are most compelling.