DCT

7:25-cv-00273

Ascale Tech LLC v. Intel Corp

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Key Events
Amended Complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 7:25-cv-00273, W.D. Tex., 11/03/2025
  • Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Defendant Intel has a regular and established place of business in the district, specifically a facility in Austin, Texas, and has committed alleged acts of infringement within the district.
  • Core Dispute: Plaintiff alleges that a wide range of Defendant's products—including Core processors, Agilex FPGAs, and Photonic Integrated Circuits—infringe five patents related to semiconductor power management, dynamic voltage scaling, thread scheduling, and optical communications in die stacks.
  • Technical Context: The technologies at issue cover fundamental aspects of modern semiconductor design, addressing challenges in power efficiency, performance optimization in multi-core architectures, and high-bandwidth data transfer between chips.
  • Key Procedural History: The complaint notes that Plaintiff is not asserting pre-suit indirect infringement or willfulness but expressly reserves the right to re-plead these allegations based on evidence from discovery. The complaint maintains claims for post-suit indirect and willful infringement, based on knowledge of the patents as of the filing of the original complaint on June 16, 2025.

Case Timeline

Date Event
2006-02-13 U.S. Patent No. 7,490,266 Priority Date
2006-02-27 U.S. Patent No. 7,953,991 Priority Date
2008-01-22 U.S. Patent No. 8,739,165 Priority Date
2009-02-10 U.S. Patent No. 7,490,266 Issues
2010-03-08 U.S. Patent No. 8,760,136 Priority Date
2011-05-31 U.S. Patent No. 7,953,991 Issues
2013-06-10 U.S. Patent No. 9,094,135 Priority Date
2014-05-27 U.S. Patent No. 8,739,165 Issues
2014-06-24 U.S. Patent No. 8,760,136 Issues
2015-07-28 U.S. Patent No. 9,094,135 Issues
2025-06-16 Original Complaint Filing Date
2025-11-03 Amended Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,490,266 - "Integrated Circuit and Processing System with Improved Power Source Monitoring and Methods For Use Therewith"

The Invention Explained

  • Problem Addressed: The patent describes how interruptions from a power source, such as a low battery or disconnection of an external supply, can cause handheld electronic devices to "hang-up, crash or otherwise malfunction" (’266 Patent, col. 1:26-32).
  • The Patented Solution: The invention proposes a processing system with a dedicated power monitor circuit. This circuit monitors the power source for an error condition (e.g., low voltage) and, upon detection, powers down the system's components, such as the processing and memory modules, in a "predictable fashion" to avoid a crash or data loss (’266 Patent, Abstract; col. 2:16-40). This provides for an organized shutdown rather than an abrupt failure.
  • Technical Importance: This approach aimed to improve the reliability of battery-powered and portable electronics by managing power-loss events gracefully, preventing system instability and potential data corruption.

Key Claims at a Glance

  • The complaint asserts independent method claim 23 (Compl. ¶23).
  • The essential elements of claim 23 include:
    • powering up a power source in response to a user event to thereby provide power to a processing module of an integrated circuit;
    • monitoring the power source using an on-chip power monitor circuit of the integrated circuit; and
    • powering down the power source and the processing module from the on-chip power monitor circuit when a first error condition is detected in the power source.

U.S. Patent No. 7,953,991 - "Processing System and Methods for use Therewith"

The Invention Explained

  • Problem Addressed: The patent identifies the need for memory devices within handheld electronics to operate effectively over a wide range of environmental temperatures (’991 Patent, col. 1:32-37).
  • The Patented Solution: The invention describes a system that adjusts the source voltage supplied to a memory module based on a received temperature signal. The system compares the temperature to a first (cold) threshold and a second (hot) threshold and increases the voltage when the temperature is either below the cold threshold or above the hot threshold, while maintaining the voltage when it is between the thresholds (’991 Patent, Abstract; col. 5:62-col. 6:2). This U-shaped voltage response curve is designed to ensure memory stability at temperature extremes.
  • Technical Importance: By dynamically adjusting voltage based on temperature, the system can maintain memory performance and reliability across diverse operating conditions without being over-provisioned with a high voltage at all times.

Key Claims at a Glance

  • The complaint asserts independent method claim 13 (Compl. ¶36).
  • The essential elements of claim 13 include:
    • receiving a temperature signal;
    • making a first comparison...and a second comparison between the temperature signal and first and second temperature thresholds;
    • adjusting a source voltage to a memory module...by increasing the source voltage when the temperature signal indicates that a temperature is either below the first temperature threshold or above the second temperature threshold; and
    • maintaining the source voltage at a current level when the temperature...is between the first and second temperature thresholds.

U.S. Patent No. 8,739,165 - "Shared Resource Based Thread Scheduling with Affinity and/or Selectable Criteria"

  • Technology Synopsis: The patent discloses a method for scheduling software threads on multi-core processors. The system determines if a thread has "affinity" for a core (e.g., based on data locality in the core's cache) and also considers user-selectable criteria, such as "minimize power" or "maximize performance," to select the optimal core for execution (’165 Patent, Abstract).
  • Asserted Claims: Independent method claim 1 (Compl. ¶51).
  • Accused Features: Intel's Thread Director technology, which is alleged to determine thread affinity by analyzing cache activity and to schedule threads on either Performance-cores or Efficient-cores to optimize for either performance or power efficiency (Compl. ¶52, ¶54, ¶55).

U.S. Patent No. 9,094,135 - "Die Stack with Optical TSVs"

  • Technology Synopsis: The patent describes a system for optical communication within a 3D-stacked integrated circuit. A laser on a "first die" generates an unmodulated light beam, which is routed via optical structures (such as waveguides and Through-Silicon Vias or TSVs) to modulators on other "receiving die" in the stack. These modulators then encode electrical signals onto the light beam, allowing a single light source to serve multiple dies (’135 Patent, Abstract).
  • Asserted Claims: Independent method claim 13 (Compl. ¶65).
  • Accused Features: Intel Photonic Integrated Circuits (PIC) and Optical Compute Interconnect (OCI) products. These are alleged to use a dedicated Indium Phosphide (InP) die to generate a laser source light beam, which is transmitted via waveguides to silicon modulators on a receiving die for modulation (Compl. ¶66-68).

U.S. Patent No. 8,760,136 - "Dynamic Voltage Scaling Interface"

  • Technology Synopsis: The patent discloses a method for a dynamic voltage scaling (DVS) interface. A processor sends a DVS signal to indicate a desired voltage change; a switcher controller monitors the duration that this signal is active (e.g., by counting clock edges) and provides a corresponding adjustment signal to a power supply for real-time adjustments (’136 Patent, Abstract).
  • Asserted Claims: Independent method claim 1 (Compl. ¶78).
  • Accused Features: Intel products implementing Dynamic Voltage and Frequency Scaling (DVFS), such as 12th Generation processors. The complaint alleges these products use technologies like "System Agent Geyserville" (SAGV) to monitor processor state and scale voltage based on time measured in clock cycles (Compl. ¶79-82).

III. The Accused Instrumentality

Product Identification

  • The complaint names several categories of Intel products:
    • Intel microprocessors with Fully Integrated Voltage Regulators (FIVR) (accused of infringing the ’266 Patent) (Compl. ¶22).
    • Intel's Agilex 5 Series FPGAs and SoCs (accused of infringing the ’991 Patent) (Compl. ¶35).
    • Intel Core Processors (12th, 13th, and 14th Gen) with Intel Thread Director (accused of infringing the ’165 Patent) (Compl. ¶19, ¶50).
    • Intel Photonic Integrated Circuits (PIC) and Optical Compute Interconnect (OCI) (accused of infringing the ’135 Patent) (Compl. ¶19, ¶64).
    • Intel products implementing dynamic voltage scaling (DVS) or DVFS (accused of infringing the ’136 Patent) (Compl. ¶77).

Functionality and Market Context

  • The accused products represent core components of modern computing, from consumer and enterprise processors to specialized FPGAs and cutting-edge optical interconnects.
  • The complaint alleges that FIVR technology integrates voltage regulators onto the processor die to provide fine-grained power control, a key feature for improving power efficiency in mobile and server products (Compl. ¶24). An architectural diagram from an Intel presentation illustrates how FIVR consolidates multiple platform voltage regulators into the processor package (Compl. p. 9).
  • The Agilex 5 Series devices are described as using an on-chip "SmartVID" feature, managed by a Secure Device Manager (SDM) Power Manager, to dynamically adjust voltage in response to temperature changes to maintain device performance (Compl. ¶38, ¶39). A diagram from Intel documentation shows a block diagram of this SDM Power Manager subsystem (Compl. p. 20).
  • Intel Thread Director is described as a hardware-level technology that assists the operating system in scheduling tasks on the appropriate processor core (Performance-core vs. Efficient-core) by monitoring the instruction mix of threads and the state of each core (Compl. ¶53, ¶55).

IV. Analysis of Infringement Allegations

U.S. Patent No. 7,490,266 Infringement Allegations

Claim Element (from Independent Claim 23) Alleged Infringing Functionality Complaint Citation Patent Citation
powering up a power source in response to a user event to thereby provide power to a processing module of an integrated circuit Intel microprocessors with FIVR include integrated voltage regulators that manage power delivery to processor cores (processing modules), which are powered up to provide optimal operation. ¶24 col. 5:29-39
monitoring the power source using an on-chip power monitor circuit of the integrated circuit An on-chip Power Control Unit (PCU) continuously oversees the power source by receiving data from monitors regarding voltage levels, current draw, and temperature to ensure proper operation. ¶25 col. 2:16-22
powering down the power source and the processing module from the on-chip power monitor circuit when a first error condition is detected in the power source Voltage regulators in Intel microprocessors with FIVR shut down if the detected input voltage is outside the normal range, a feature described in Intel's documentation as Under-Voltage Lockout (UVLO). (Compl. p. 11). ¶26 col. 2:22-28

Identified Points of Contention

  • Scope Questions: The infringement theory may raise a question of claim scope regarding the term "power source". The analysis may focus on whether Intel's on-die FIVR, which functions as a second-stage DC-DC converter for specific processor domains, can be considered the "power source" as contemplated by the patent, which describes a component that generates the primary supply voltage for the system from a battery or external supply (’266 Patent, col. 2:9-12; Fig. 7).
  • Technical Questions: A potential technical question is whether the accused "on-chip power monitor circuit" (e.g., the PCU and related sensors) performs the specific function of "powering down the power source...from the on-chip power monitor circuit" as required by the claim. The analysis may explore whether the accused UVLO function is directly controlled by the monitor in the manner claimed, or if it operates as an independent protection circuit.

U.S. Patent No. 7,953,991 Infringement Allegations

Claim Element (from Independent Claim 13) Alleged Infringing Functionality Complaint Citation Patent Citation
receiving a temperature signal Intel Agilex 5 Series devices have "on-chip voltage and temperature sensors" that provide data to a Secure Device Manager (SDM) subsystem. A block diagram illustrates these on-chip sensors (Compl. p. 17). ¶37 col. 3:9-14
making a first comparison...and a second comparison between the temperature signal and first and second temperature thresholds The SDM Power Manager "checks for local temperature sensor changes and updates the new VID value...if the temperature crosses the threshold point," indicating comparisons against defined temperature thresholds. ¶38, ¶39 col. 3:36-44
adjusting a source voltage...by increasing the source voltage when the temperature...is either below the first temperature threshold or above the second temperature threshold The devices are alleged to compensate for performance degradation at colder temperatures by raising the voltage. The complaint also alleges performance maintenance by comparison with a hot temperature threshold. ¶40 col. 3:36-44; 5:62-6:2
maintaining the source voltage at a current level when the temperature...is between the first and second temperature thresholds The complaint alleges that "dynamic voltage adjustment does not occur if the temperature remains within 20 +/- 5 degrees," and includes a graph showing voltage held at a constant level between discrete temperature steps (Compl. p. 19). ¶41 col. 6:2-5

Identified Points of Contention

  • Technical Questions: A central technical question may arise from the claim requirement to "increas[e] the source voltage when the temperature... is... above the second temperature threshold." The complaint includes a graph titled "Temperature Compensation for SmartVID" that appears to show the accused Agilex 5 devices decreasing the voltage as temperature rises (Compl. p. 19). This visual evidence may suggest a fundamental operational difference between the accused product's behavior at high temperatures and the specific mechanism required by the claim language, which is based on a U-shaped voltage curve as depicted in the patent (’991 Patent, Fig. 14).

V. Key Claim Terms for Construction

For U.S. Patent No. 7,490,266:

  • The Term: "power source"
  • Context and Importance: The definition of this term is critical because the infringement allegation targets Intel's on-die FIVR. The dispute will likely center on whether "power source" is limited to a primary system power converter or if it can also read on a secondary, on-die voltage regulator.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The claim requires a "power source" that is a "DC-DC converter" (’266 Patent, Claim 21 referencing Claim 20). The complaint alleges that FIVR is a type of DC-DC converter (Compl. p. 8, describing "multiphase buck converters").
    • Evidence for a Narrower Interpretation: The patent's specification consistently discusses the problem in the context of interruptions from a battery or external supply (’266 Patent, col. 1:26-32). The figures depict the "power source 110" as the component that interfaces with an "external power source 111" or "battery 112," distinct from the "processing module 100" (’266 Patent, Fig. 4, Fig. 7). This may suggest the term refers to the primary power supply for the entire integrated circuit, not an internal regulator for a sub-component.

For U.S. Patent No. 7,953,991:

  • The Term: "increasing the source voltage when the temperature... is... above the second temperature threshold"
  • Context and Importance: Practitioners may focus on this phrase because its application to the accused product appears to be a primary point of factual dispute. The case may turn on whether the operation of Intel's "SmartVID" technology at high temperatures can be characterized as meeting this limitation, especially in light of technical documentation provided in the complaint.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent specification discusses a general goal of providing "temperature compensation to memory module 20 allowing... a wider range of operating temperatures" (’991 Patent, col. 4:21-24). An argument could be made that any voltage adjustment for high temperatures, even if not a direct increase, falls within the spirit of the invention.
    • Evidence for a Narrower Interpretation: The claim language is specific: "increasing the source voltage." The patent's own figures, particularly Figure 14, explicitly depict a U-shaped voltage curve where voltage at high temperatures is raised relative to a nominal midpoint, not lowered (’991 Patent, Fig. 14). This provides strong evidence that the claim requires a specific technical mechanism that may differ from that of the accused product.

VI. Other Allegations

  • Indirect Infringement: For all asserted patents, the complaint alleges induced infringement under 35 U.S.C. § 271(b). The allegations are based on Defendant’s affirmative acts of providing customers and end-users with product manuals, technical support, online documentation, and advertisements that allegedly instruct and encourage users to operate the accused products in an infringing manner (Compl. ¶28, ¶43, ¶57, ¶70, ¶84).
  • Willful Infringement: The complaint alleges willful infringement based on Defendant's knowledge of the patents-in-suit, which it alleges began, at the latest, upon the filing of the original complaint on June 16, 2025 (Compl. ¶18). Plaintiff explicitly states it is not asserting pre-suit willfulness at this stage but reserves the right to amend its allegations pending discovery (Compl. ¶18, n.1).

VII. Analyst’s Conclusion: Key Questions for the Case

The resolution of this case may turn on the court's determination of several central issues:

  • A core issue will be one of definitional scope: For the ’266 Patent, can the term "power source," which in the patent's context refers to a primary system power supply, be construed to encompass a secondary, on-die "fully integrated voltage regulator" (FIVR) that manages power for specific processor domains?

  • A key evidentiary question will be one of technical operation: For the ’991 Patent, does Intel's Agilex 5 "SmartVID" technology infringe a claim requiring an increase in voltage at high temperatures when the complaint's own supporting documentation appears to show the accused technology decreases voltage as temperature rises?

  • A central dispute for the ’165 Patent may involve proof of mechanism: Can the Plaintiff provide sufficient evidence to demonstrate that Intel's proprietary Thread Director hardware determines thread affinity by "counting a number of writes by one or more other threads to a cache," the specific method recited in the asserted claim, as opposed to using other undisclosed metrics for affinity?