PTAB

IPR2013-00217

Hewlett Packard Co v. MCM Portfolio LLC

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1. Case Identification

2. Patent Overview

  • Title: Multimode Controller for Intelligent and "Dumb" Flash Cards
  • Brief Description: The 7,162,549 patent describes a multi-format memory card reader system with a controller chip designed to interface with different types of flash memory cards, including those that have an on-card controller for error correction ("intelligent") and those that do not ("dumb").

3. Grounds for Unpatentability

Ground 1: Anticipation by AwYong - Claims 7, 11, 19, and 21 are anticipated under 35 U.S.C. §102 by AwYong.

  • Prior Art Relied Upon: AwYong (a thesis titled "An Integrated Control System Design of Portable Computer Storage Peripherals," published Dec. 22, 2000).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that AwYong disclosed every limitation of the challenged claims. AwYong described a single-chip controller for a computing device (PC) that interfaces with multiple types of flash storage systems, including SmartMedia cards (which lack a controller) and CompactFlash/MMC cards (which have a controller). The controller chip included distinct interface modules (a "flash adapter") for each card type. AwYong's controller determined the card type via a "storage card-interface control register" and, for controllerless SmartMedia cards, used an integrated SM_ECC module and firmware to perform necessary error correction and bad block mapping operations on behalf of the card. These teachings were alleged to map directly to the limitations of independent claims 7 and 11 and their respective dependent claims 19 and 21.

Ground 2: Obviousness over Battaglia and Samsung Datasheet - Claims 7, 11, 19, and 21 are obvious over Battaglia alone or in view of the Samsung Datasheet.

  • Prior Art Relied Upon: Battaglia (Patent 6,987,927) and the Samsung Datasheet (a datasheet for a Samsung SmartMedia Card, available Nov. 20, 2000).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Battaglia disclosed an "enhanced digital data collector" with a processor that interfaced with multiple types of flash memory, including controllerless SmartMedia cards and cards with controllers (CompactFlash, MMC, etc.). This system used a "card detect circuit" to determine the type of card inserted. While Battaglia’s system included memory for storing "program code/firmware" for management and control tasks, the petition argued that incorporating specific error correction (ECC) and bad block mapping routines for SmartMedia cards would have been obvious. The Samsung Datasheet explicitly taught these required ECC and bad block mapping operations, providing flow charts for implementation by a host system.
    • Motivation to Combine: A POSITA would combine the Samsung Datasheet with Battaglia's system because Battaglia expressly disclosed a host for SmartMedia cards. A POSITA designing such a host would naturally consult and implement the well-documented, standard protocols from the Samsung Datasheet to ensure proper functionality and to improve the efficiency and reliability of data storage on the SmartMedia cards.
    • Expectation of Success: A POSITA would have had a high expectation of success, as the combination involved implementing a standard, publicly documented protocol (from Samsung Datasheet) for a specific card type into a system (Battaglia) already designed to support that card type.

Ground 3: Obviousness over Kobayashi and Kikuchi - Claims 7, 11, 19, and 21 are obvious over Kobayashi in view of Kikuchi.

  • Prior Art Relied Upon: Kobayashi (Patent 6,199,122) and Kikuchi (WO 98/03915).
  • Core Argument for this Ground:
    • Prior Art Mapping: Kobayashi disclosed a reader/writer system that interfaced with flash memory cards both with and without on-card ATA controllers. The system used a sensor to detect which type of card was inserted and routed signals accordingly—either to an external ATA controller in the reader/writer for controllerless cards or directly to the system's conversion controller for cards with their own controller. Kobayashi mentioned that its controllers performed memory management operations like error checking but was silent on the details of bad block mapping. Kikuchi, which addressed the same technical problem, described an ATA-compliant controller that could be located either on a card or in an external adapter. Crucially, Kikuchi explicitly taught using firmware in its controller to perform detailed ECC and bad block mapping operations.
    • Motivation to Combine: A POSITA would combine Kikuchi's teachings with Kobayashi's system to improve its functionality. Since Kobayashi's system needed to handle controllerless cards, a POSITA would have been motivated to incorporate the detailed, robust ECC and bad block mapping techniques from a similar ATA controller system like Kikuchi's to "reliably retain stored data."
    • Expectation of Success: The combination would have yielded predictable results. Both Kobayashi and Kikuchi taught that the ATA controller's functionality was the same regardless of its location (on-card or off-card in a reader). Therefore, integrating Kikuchi’s firmware-based error management techniques into Kobayashi's functionally identical off-card ATA controller was a straightforward design choice.

4. Key Claim Construction Positions

  • "flash adapter" / "flash adapter section": Petitioner adopted the construction from a related ITC investigation, meaning "a section of the controller chip that enables communication with the flash storage system."
  • "flash storage system" / "flash section": Petitioner argued these terms, under their broadest reasonable interpretation, referred to a "flash memory card" and "flash memory circuits," respectively, based on descriptions in the ’549 patent specification.

5. Relief Requested

  • Petitioner requests institution of IPR and cancellation of claims 7, 11, 19, and 21 as unpatentable.