PTAB
IPR2013-00473
Silicon Motion Technology Corp v. Phison Electronics Corp
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2013-00473
- Patent #: 8,176,267
- Filed: July 30, 2013
- Petitioner(s): Silicon Motion Technology Corp.
- Patent Owner(s): Phison Electronics Corp.
- Challenged Claims: 1-25
2. Patent Overview
- Title: Data Access Method and Controller Using the Same
- Brief Description: The ’267 patent discloses a data access method for a flash memory storage system that includes a "data perturbation module" (e.g., a scrambler). The method aims to prevent a host device from receiving garbled code when reading unwritten memory blocks by first determining if a target block is "new" and, if so, transmitting predetermined data (e.g., 0xFF) instead of attempting to decode the unwritten block's contents.
3. Grounds for Unpatentability
Ground 1: Anticipation over Sharon - Claims 1-2, 11-12, and 22-23 are anticipated under 35 U.S.C. §102 by Sharon.
- Prior Art Relied Upon: Sharon (Application # 2008/0151618).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Sharon disclosed every element of the challenged claims. Sharon teaches a flash memory system with a "randomization module" that is equivalent to the ’267 patent's "data perturbation module." Sharon explicitly recognized the problem of "confusion" that could arise between a page that was truly programmed with all '1's and a page that was merely erased (unwritten). To solve this, Sharon disclosed a method to distinguish an unwritten page from a written page, for example, by using flag cells. If a page is found to be unwritten (a "new block"), it is "interpreted according to the standard prior art logic," which involves returning the predetermined erased state value (all '1's, or 0xFF). If a page is found to be written, the data is decoded by the derandomizer and sent to the host. This process directly maps to the claimed method of determining block status and selectively transmitting either predetermined data or decoded data.
Ground 2: Obviousness over Sharon and Bennett - Claims 1-7 and 9-25 are obvious over Sharon in view of Bennett.
- Prior Art Relied Upon: Sharon (Application # 2008/0151618) and Bennett (Application # 2007/0113030).
- Core Argument for this Ground:
- Prior Art Mapping: This ground was presented as an alternative to anticipation. Petitioner asserted that Sharon provides the primary framework, including the flash memory controller with a randomizer/derandomizer and the recognition of the need to handle unwritten pages differently to avoid confusion. Bennett was argued to supply the specific "standard prior art logic" that Sharon refers to for handling such unwritten pages. Bennett explicitly teaches a system that checks if a sector to be read has an "erased state." If it does, the system returns a predetermined value (e.g., "FF," "erased data," or "1") to the host.
- Motivation to Combine: A POSITA would combine these references because Sharon expressly directs one to use "standard prior art logic" to handle unwritten pages. Bennett provides a clear example of such standard logic. The motivation was to implement Sharon’s system for avoiding data confusion by using a well-understood and conventional method for managing erased memory blocks, as taught by Bennett. Both references address the same technical field and were assigned to the same corporate family (SanDisk).
- Expectation of Success: A POSITA would have had a high expectation of success in combining the teachings. The combination involved applying a known technique for handling erased blocks (from Bennett) to solve a problem explicitly identified in a flash memory system using data randomization (from Sharon). The integration was portrayed as straightforward and predictable.
Ground 3: Anticipation over Min - Claims 1-3, 6, 8, and 22-24 are anticipated under 35 U.S.C. §102 by Min.
Prior Art Relied Upon: Min (Application # 2008/0263369).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner contended that Min disclosed all limitations of the challenged claims. Min teaches a flash memory system with an encryption/decryption unit, which serves as the data perturbation module. Min's system uses an "Allocation Information" field in a spare memory area to track page status. If this field contains a value of 0xFF, it indicates the corresponding page is "not used" (i.e., it is a new block). When the controller receives a read request for a page marked as "not used," it transmits predetermined data stored in the main array to the host. Conversely, if the page is in use, the controller reads the encrypted data, decodes it using the decryption unit, and transmits the decoded data. This methodology was argued to be identical to that claimed in the ’267 patent.
Additional Grounds: Petitioner asserted additional obviousness challenges, including that claim 8 is obvious over Sharon in view of Asnaashari (Patent 5,928,370), and that various claims are obvious over Min in view of Morley (Patent 6,549,446). These grounds relied on Asnaashari for specific teachings on decoding 0xFF data and on Morley for the conventional practice of initializing memory to a known, predetermined value (all 0s or all 1s).
4. Relief Requested
- Petitioner requests institution of an inter partes review and cancellation of claims 1-25 of the ’267 patent as unpatentable.
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