PTAB

IPR2014-00994

SanDisk Corp v. Netlist Inc

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1. Case Identification

2. Patent Overview

  • Title: Non-Volatile Memory Module
  • Brief Description: The ’833 patent describes a memory system coupled to a host system, where the memory system includes both a volatile memory subsystem (e.g., DRAM) and a non-volatile memory subsystem (e.g., flash). The core disclosed concept is operating the volatile memory at a first clock frequency for communications with the host, and at a second, different clock frequency for data transfers with the non-volatile subsystem.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1, 2, 13, 15, 18, and 29 under 35 U.S.C. §102

  • Prior Art Relied Upon: Fukuzo (Application # 2006/0294295).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Fukuzo discloses every limitation of the independent claims. Fukuzo describes a hybrid memory chip with a volatile SDRAM memory array and a non-volatile flash memory device. Petitioner asserted that Fukuzo explicitly teaches operating the volatile SDRAM core at a first, high frequency (130 MHz) when communicating with a host CPU (the "first mode of operation"). It also teaches operating both the volatile memory's flash controller section and the non-volatile flash memory at a second, lower frequency (20 MHz) when transferring data between them (the "second mode of operation"), satisfying the key limitations of claims 1 and 15. For dependent claims, Fukuzo allegedly discloses the third clock frequency being equal to the second (claim 2) and the use of configurable clock generators (claim 13).

Ground 2: Obviousness of Claims 1-6, 8, 11-13, 15, 17-22, 24, and 27-29 are obvious over Fukuzo in view of Li

  • Prior Art Relied Upon: Fukuzo (Application # 2006/0294295) and Li (Patent 6,336,174).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner contended that Fukuzo teaches the core claimed system of using different clock frequencies for host-versus-internal communication. Li was cited to provide teachings of specific operational modes and trigger conditions that might not be explicit in Fukuzo. Li discloses a hardware-assisted memory module (HAMM) with a "normal mode" for host-to-volatile memory communication and a "backup mode," initiated by a trigger event (e.g., power failure), for volatile-to-non-volatile data transfer. This combination allegedly supplies all limitations, including those in dependent claims related to backup operations (claim 8), restore operations (claim 12), and switching modes in response to a trigger condition (claim 4).
    • Motivation to Combine: Petitioner argued a person of ordinary skill in the art (POSITA) would combine Li's teachings with Fukuzo because both address hybrid memory systems. A POSITA would have been motivated to incorporate Li’s trigger-based backup mode into Fukuzo's system to enhance data integrity and prevent data loss upon power failure, a well-known problem with volatile memory.
    • Expectation of Success: Petitioner asserted success would be expected as the combination involves integrating a known backup-on-failure feature into a known hybrid memory architecture, which was a predictable design choice.

Ground 3: Obviousness of Claims 1-6, 8, 11, 12, 15, 17-22, 24, and 26-28 are obvious over Panabaker in view of Li

  • Prior Art Relied Upon: Panabaker (Patent 7,716,411) and Li (Patent 6,336,174).

  • Core Argument for this Ground:

    • Prior Art Mapping: This ground presented an alternative to Fukuzo as the primary reference. Petitioner asserted Panabaker independently discloses the core invention by teaching a hybrid memory device where a volatile RAM buffer operates at a high clock frequency to comply with SDRAM speed protocols when interfacing with a host CPU. For internal data transfers, the controller and non-volatile flash memory operate at a lower clock frequency. As in the previous ground, Li was added to explicitly teach the concepts of distinct backup/restore modes and the use of trigger events to initiate data backup from the volatile to the non-volatile subsystem.
    • Motivation to Combine: The motivation was parallel to that of the Fukuzo/Li combination. A POSITA would recognize the benefits of adding Li's established trigger-based backup system to Panabaker's hybrid memory architecture to protect against data loss in its volatile SDRAM, thereby creating a more robust and reliable memory module.
    • Expectation of Success: Success in this combination was argued to be highly predictable, as it constituted the application of a known data-protection strategy (from Li) to a known memory system design (from Panabaker).

  • Additional Grounds: Petitioner asserted numerous additional obviousness challenges based on various combinations of Fukuzo or Panabaker with other references, including Spiers (Application # 2006/0080515) for capacitor-based backup power, Hansen (Application # 2005/0132250) for backing up intermediate computation data, Sun (Patent 7,102,391) for user-configurable clock frequencies, and Komatsuzaki (Patent 6,944,042) for a controller to couple/decouple the memory subsystems.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-30 of the ’833 patent as unpatentable.