PTAB

IPR2014-01198

HTC Corp v. NFC Technology LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Data Transmission Device with Inductive Coupling
  • Brief Description: The ’551 patent discloses inductive coupling data transmission devices, such as contactless smart card readers, designed for RFID systems. The core technology involves using a microprocessor with multiple binary ports to directly supply power to and modulate the amplitude of an antenna signal, thereby eliminating the need for a separate, complex modulation circuit.

3. Grounds for Unpatentability

Ground 1: Claims 1-3 and 5 are obvious over Sears.

  • Prior Art Relied Upon: Sears (Patent 6,122,492).
  • Core Argument: Sears, which addresses the need for a flexible and compact RFID transmitter, teaches the core concept of the ’551 patent. It discloses an adjustable radio frequency (RF) power amplifier that uses a variable number of tristate ports (parallel buffers) to power an antenna, thereby achieving the same goals with the same solution as the challenged patent.
    • Prior Art Mapping: Sears discloses an RF system where amplitude modulation is achieved by controlling the output power of an amplifier. This is done by selectively adjusting the number of active parallel buffers driving the antenna. These buffers are tristate, capable of high-level output, low-level output, or a high-impedance state (complete disconnection). This directly maps to the method of claim 1, which requires setting ports to "1" for full power, "0" for 100% modulation (dependent claim 2), and a high-impedance state for modulation less than 100% (dependent claim 3). Sears also discloses a non-zero internal resistor in its buffer design, mapping to another key limitation.
    • Motivation to Combine (for §103 grounds): Not applicable (single reference).

Ground 2: Claims 1-3 and 5 are obvious over Downs.

  • Prior Art Relied Upon: Downs (Patent 5,926,110).
  • Core Argument: Downs discloses a programmable output device for an RF/ID transponder that adjusts signal amplitude to meet varying system conditions. It achieves this by selectively including or bypassing resistors in the antenna's driving circuitry using transistor switches, which function as the claimed binary ports.
    • Prior Art Mapping: Downs teaches a control circuit that adjusts the amplitude of a signal transmitted from an antenna. It uses ports, each containing a resistor and a transistor switch, to control the output. Activating a switch (setting to "1") shorts the corresponding resistor, removing it from the circuit and allowing higher power output. Deactivating a switch (setting to "0") leaves the resistor in the circuit, creating a high-impedance state that limits current and modulates the signal. Setting all ports to "1" provides full power, while setting all to "0" provides maximum modulation. This structure and method align with the limitations of claims 1-3 and 5.

Ground 3: Claims 1-3 and 5 are obvious over Asakura in view of Carroll.

  • Prior Art Relied Upon: Asakura (Patent 5,835,010) and Carroll (Patent 5,347,263).

  • Core Argument: Both Asakura and Carroll disclose RFID systems for automotive security. Asakura uses a control circuit with a separate, complex driving circuit to achieve multi-level amplitude modulation. Carroll teaches a more elegant and compact solution where a microcontroller with multiple parallel I/O ports directly drives the antenna, eliminating the need for a separate driver. The combination of these references renders the claims obvious.

    • Prior Art Mapping: The proposed combination replaces Asakura's control circuit and separate driver with Carroll's more compact microcontroller. Carroll's microcontroller (a PIC16C5x series, similar to the PIC16C6x in the ’551 patent) is known to have I/O ports that can be individually set to a high-impedance state. This high-impedance capability from Carroll would be used to selectively disconnect one or more parallel ports from the antenna, thereby achieving the different modulation levels taught by Asakura but with a simpler, integrated design.
    • Motivation to Combine (for §103 grounds): A POSITA would combine Asakura and Carroll to gain the benefits of Carroll's compact design (fewer components, lower cost, smaller size) while retaining the functionality of Asakura's multi-level modulation. This involves a simple substitution of Carroll’s microcontroller for Asakura's control and driving circuits to create a more efficient and improved device.
    • Expectation of Success: A POSITA would have a reasonable expectation of success because it involves substituting a known type of integrated circuit (Carroll's microcontroller) for a less efficient one (Asakura's driver) to perform a known function (driving an antenna) while using the inherent, documented capabilities (high-impedance state) of the substituted component to achieve a desired result (variable amplitude modulation).

  • Additional Grounds: Petitioner asserted additional obviousness challenges, including one combining Sears with Nguyen (Patent 5,399,925) to provide more explicit detail on the high-impedance state of a tristatable buffer. Another ground combined Carroll with Admitted Prior Art from the ’551 patent itself, arguing that the combination of known features was obvious.

4. Key Claim Construction Positions

Petitioner proposed constructions for several key terms, arguing they should be interpreted broadly in light of the specification.

  • “Binary Ports That Can Be Set To High Impedance State”: Petitioner contended this term should not be limited to microprocessor ports but should broadly cover any portion of a control circuit that can be set to binary logic “1,” “0,” or a high-impedance state.
  • “High Impedance State”: This term was argued to be synonymous with a disconnected switch creating an open-circuit state.
  • “Full Power Level”: Petitioner proposed this term means the maximum output power the circuit is configured to achieve, which occurs when all relevant ports are set to binary logic “1.”
  • “100% Modulation”: This was argued to mean the state where ports are set to binary logic “0,” resulting in the minimum possible power output (e.g., zero volts).

5. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 1-3 and 5 of the ’551 patent as unpatentable.