PTAB

IPR2014-01396

LG Electronics Inc v. Cypress Semiconductor Corp

Log In
Key Events
Petition
petition Intelligence

1. Case Identification

2. Patent Overview

  • Title: System and Method for Reconfiguring a Peripheral Device
  • Brief Description: The ’825 patent relates to a system for reconfiguring a peripheral device connected to a host computer over a bus (e.g., USB). The invention uses an electronic circuit to simulate a physical disconnection and reconnection, which prompts the host computer to initiate its enumeration process and recognize the peripheral's new configuration without requiring a user to physically unplug and re-plug the device.

3. Grounds for Unpatentability

Ground 1: Claims 1, 5, 7, 10, 11, and 15-17 are obvious over Admitted Prior Art and Yap

  • Prior Art Relied Upon: Admitted Prior Art ("APA") from the ’825 patent specification and Yap (Patent 6,073,193).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that the APA, based on admissions in the ’825 patent's background section, disclosed all elements of the challenged claims except for the means to "electronically simulate" a physical disconnect/reconnect cycle. The APA acknowledged the known problem that reconfiguring a peripheral required downloading new code and then physically disconnecting and reconnecting the device to trigger the host's enumeration process. Petitioner asserted that Yap explicitly taught the missing element: a circuit with switches on the USB data lines (D+ and D-) designed to electronically simulate this physical removal. Yap’s circuit was designed to recover from a USB "brown out" condition by emulating the disconnect/reconnect procedure, thereby allowing the host to reconfigure the device.
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would combine Yap’s electronic switching circuit with the system described in the APA to solve the exact problem identified in the APA—the inconvenience and inefficiency of physically unplugging devices for reconfiguration. Yap’s solution to a "brown out" condition was directly analogous to the general reconfiguration problem.
    • Expectation of Success: Combining the references would involve applying a known solution (Yap's electronic switch) to a known problem (the need for a disconnect/reconnect cycle described in the APA), leading to the predictable result of a more convenient reconfiguration process.

Ground 2: Claims 1-3, 10, 11-13, and 17 are obvious over Michelson, PCCextend, and Davis

  • Prior Art Relied Upon: Michelson (Patent 5,628,028), PCCextend (a 1995 user's manual), and Davis (Patent 5,862,393).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued this combination taught reconfiguring a PCMCIA card. Michelson disclosed reprogramming a PCMCIA card’s hardware by downloading new configuration data, which reconfigured the card's FPGA after a "reset" operation. Petitioner contended this "reset" met the "electronically simulate" limitation under its proposed broad construction. For a narrower construction requiring a switch, Petitioner argued PCCextend taught a manual switch on an extender card to simulate PCMCIA card removal/insertion, and Davis taught an electronic FET switch that simulated the same event by interrupting card detect signal lines.
    • Motivation to Combine: A POSITA would be motivated to integrate the teachings of PCCextend and Davis into Michelson's system to avoid the need to physically remove the PCMCIA card for reprogramming, which risked damaging its fragile connectors. A POSITA would further substitute Davis's automated electronic switch for PCCextend's manual switch as a simple design choice to improve convenience and reliability.
    • Expectation of Success: The combination involved integrating well-understood technologies within the same field (PCMCIA card interfaces) to achieve the predictable outcome of a more robust and automated reprogramming system.

Ground 3: Claims 18-20 are anticipated by Yap

  • Prior Art Relied Upon: Yap (Patent 6,073,193).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner argued that Yap alone disclosed every element of independent claim 18, which recites a system for simulating a disconnection and reconnection of a peripheral. Yap's system was argued to include a "first circuit" (the USB host computer) configured to detect the peripheral device connected to the port, and a "second circuit" (the switching circuit on the D+/D- lines) configured to electronically simulate a physical disconnection and reconnection over the bus. This simulation in Yap explicitly allowed the host to reconfigure the device. Petitioner further argued that dependent claims 19 (specifying the bus is a USB) and 20 (specifying the circuit comprises solid-state switches) were also expressly disclosed in Yap.

  • Additional Grounds: Petitioner asserted other obviousness challenges, including combinations of APA, Yap, and Michelson (for claims 2, 3, 12, 13) and Michelson, PCCextend, Davis, and APA (for claims 5, 7, 15, 16). Petitioner also asserted anticipation of claims 18 and 20 by Davis and obviousness of claim 19 over Davis and the APA.

4. Key Claim Construction Positions

  • Petitioner argued for a specific construction of the key claim term "electronically [simulate/simulating] a physical disconnection and reconnection of the peripheral device."
    • Proposed Construction: "using an electronic circuit to perform an action, such as an electronic reset, associated with physical disconnection and reconnection of a peripheral device."
    • Significance: This broad interpretation was crucial for several grounds, particularly those relying on Michelson. Petitioner argued that the electronic "reset" of an FPGA taught by Michelson fell within this construction, thereby satisfying the limitation. The construction was supported by reference to dependent claims in the ’825 patent (e.g., claim 10) that explicitly recite a "reset circuit" as part of the simulation means.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-3, 5, 7, 10-13, and 15-20 of Patent 6,249,825 as unpatentable.