PTAB

IPR2015-00163

Apple Inc v. Memory Integrity LLC A Delaware Ltd Liability Co

Log In
Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Reducing Probe Traffic in Multiprocessor Systems
  • Brief Description: The ’121 patent discloses techniques for improving data access and cache coherency in multiprocessor systems that use point-to-point interconnects. The invention focuses on using a central "probe filtering unit" to intelligently manage and reduce the number of probe messages sent between processing nodes to maintain data consistency across their respective caches.

3. Grounds for Unpatentability

Ground 1: Anticipation by Koster - Claims 1-6, 8, 11, 12, and 16 are anticipated by Koster under 35 U.S.C. §102.

  • Prior Art Relied Upon: Koster (Patent 7,698,509).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Koster, which was not considered during prosecution, discloses every limitation of the challenged claims. Koster describes a "snooping-based cache-coherence filter device," referred to as a "snoop filter," which performs the identical function of the ’121 patent’s "probe filtering unit." Koster’s snoop filter is connected to multiple microprocessors (processing nodes) via a point-to-point architecture. It receives data requests (probes) and uses a "shadow tag memory" containing cache state information (probe filtering information) to determine which processors hold a copy of the requested data. The snoop filter then forwards the probe only to those selected processors, directly mapping to the core limitations of independent claims 1 and 16.
    • Key Aspects: Koster’s shadow tag memory is described as using the MOESI (Modified, Owner, Exclusive, Shared, Invalid) protocol, which the ’121 patent acknowledges are "memory line states." This directly teaches the claimed limitation of using "probe filtering information representative of states associated with selected ones of the cache memories."

Ground 2: Obviousness over Koster in view of Duato - Claims 9 and 10 are obvious over Koster in view of Duato.

  • Prior Art Relied Upon: Koster (Patent 7,698,509) and Duato (a 1997 textbook, INTERCONNECTION NETWORKS – AN ENGINEERING APPROACH).
  • Core Argument for this Ground:
    • Prior Art Mapping: Claims 9 and 10 add the limitation that each processing node uses a "routing table" to direct all probes or broadcasts to the probe filtering unit. While Koster taught that probes are "first routed" to its snoop filter, it did not explicitly disclose the use of a routing table. Duato, a standard text on network design, taught that using routing tables ("table-lookup" routing) was a traditional, well-known approach for managing message communication in the exact type of point-to-point, direct-connect networks described in Koster.
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would combine Koster and Duato to implement the routing function described in Koster using the conventional and predictable method of a routing table taught by Duato. This was presented as a simple implementation of a known technique to achieve a known result.
    • Expectation of Success: A POSITA would have a high expectation of success, as using routing tables for directing network traffic was a fundamental and established practice.

Ground 3: Obviousness over Koster in view of O'Krafka - Claims 15 and 25 are obvious over Koster in view of O'Krafka.

  • Prior Art Relied Upon: Koster (Patent 7,698,509) and O'Krafka (Patent 7,315,919).
  • Core Argument for this Ground:
    • Prior Art Mapping: Claims 15 and 25 require the probe filtering unit to "accumulate responses" to a probe and respond to the requesting node accordingly. Koster’s snoop filter forwards responses but does not explicitly teach accumulating them. O'Krafka, which shares two inventors with Koster and describes a similar snoopy cache controller, explicitly taught including a cache memory within the controller to "hold copies of data that are frequently and/or recently requested." This cache is used to accumulate responses and respond directly to subsequent requests, reducing external traffic.
    • Motivation to Combine: A POSITA would be motivated to modify Koster's snoop filter with O'Krafka's cache memory to improve efficiency. This combination would allow the filter to directly service requests for recently accessed data, thereby reducing the frequency of broadcasting requests to other nodes, which was a stated goal of both references.
    • Expectation of Success: The combination was argued to be predictable because the components from Koster and O'Krafka are highly analogous and designed to solve the same problem of reducing unnecessary network traffic.

Ground 4: Obviousness over Koster in view of Smith - Claims 17-24 are obvious over Koster in view of Smith.

  • Prior Art Relied Upon: Koster (Patent 7,698,509) and Smith (a 1997 textbook, APPLICATION-SPECIFIC INTEGRATED CIRCUITS).
  • Core Argument for this Ground:
    • Prior Art Mapping: These dependent claims relate to the physical implementation of the probe filtering unit as an application-specific integrated circuit (ASIC), including computer-readable data structures (claim 19), a simulatable representation like a netlist (claims 20-21), hardware description language (HDL) code (claims 22-23), and semiconductor processing masks (claim 24). Koster described the functionality of its snoop filter but not its hardware implementation. Smith taught that a component like Koster's snoop filter, which handles the interface between memory and a microprocessor, is an ideal candidate for implementation as an ASIC. Smith further detailed the standard ASIC design flow, which inherently creates the data structures, HDL code, netlists, and masks recited in the claims.
    • Motivation to Combine: A POSITA would combine these teachings to implement the functional snoop filter of Koster using the standard, cost-effective, and reliable ASIC design process described by Smith.
    • Expectation of Success: Success was expected as this involved applying a standard, well-documented hardware design methodology to a functional description.

4. Key Claim Construction Positions

  • "probe filtering unit" / "probe filtering information": Petitioner argued these terms, central to the invention, should be construed broadly. The term "probe filtering unit" was mapped to Koster's "snoop filter," and "probe filtering information" was mapped to Koster's "shadow tag memory" that stores cache coherence protocol states.
  • "probe": Petitioner proposed a broad construction to encompass "a mechanism that elicits a response from a node to maintain cache coherency in a system," arguing this was consistent with the specification. This allowed Koster’s "broadcast for requested data" to be considered a "probe."

5. Key Technical Contentions (Beyond Claim Construction)

  • Priority Date Challenge: A central contention was that the ’121 patent was not entitled to the priority date of its parent application. Petitioner argued that the term "probe filtering unit" and its supporting description were new matter added in the continuation-in-part (CIP) application from which the ’121 patent issued. Therefore, the challenged claims were only entitled to the October 15, 2004 filing date of the CIP. This assertion was critical, as it established Koster and O'Krafka, both filed before the CIP date but after the parent date, as valid prior art under §102(e).

6. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 1-6, 8-12, and 15-25 of the ’121 patent as unpatentable based on the grounds presented.