MaxLinear Inc v. Cresta Technology Corp

1. Case Identification

• Case #: IPR2015-00594
• Patent #: 7,265,792
• Filed: January 28, 2015
• Petitioner(s): MaxLinear, Inc.
• Patent Owner(s): Cresta Technology Corporation
• Challenged Claims: 1-29

2. Patent Overview

• Title: Television Receiver for Digital and Analog Television Signals
• Brief Description: The ’792 patent describes a television receiver, implemented on a single integrated circuit, that uses a single processing path to process television signals in either analog or digital formats. The invention aims to obviate the need for duplicate components by using a reconfigurable digital signal processor to support multi-standard reception.

3. Grounds for Unpatentability

Ground 1: Anticipation over Favrat - Claims 1, 2, 4, 5, 11, and 24-29 are anticipated by Favrat

• Prior Art Relied Upon: Favrat (Patent 7,075,585).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Favrat, which discloses a broadband receiver with a multistandard channel filter, teaches every element of the challenged claims. The central contention for independent claim 1 focused on the "signal output circuit." Petitioner asserted that the ’792 patent's genus limitation of a "signal output circuit" was anticipated by Favrat's specific disclosure of a species, a digital-to-analog converter (DAC), that performs the identical function. For dependent claims, Petitioner mapped limitations such as processing both analog and digital formats (claim 2), providing video/audio baseband signals (claim 4), and storing finite impulse response (FIR) filters in memory (claim 24) to explicit disclosures within Favrat.

Ground 2: Obviousness over Favrat and Arambepola - Claim 3 is obvious over Favrat in view of Arambepola

• Prior Art Relied Upon: Favrat (Patent 7,075,585), Arambepola (Patent 7,280,616).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground addressed dependent claim 3, which adds the limitation that the television receiver is "formed as a monolithic integrated circuit." Petitioner asserted that while Favrat teaches integrating the tuner, channel filter, and demodulators onto the "same piece of integrated circuit," Arambepola explicitly teaches that a digital receiver is "embodied as one or more monolithic integrated circuits" to achieve improved performance and reduced manufacturing cost.
  • Motivation to Combine: Petitioner argued a person of ordinary skill in the art (POSITA) would combine the teachings because both Favrat and Arambepola relate to multi-standard television receivers. A POSITA would have been motivated to implement Favrat’s receiver as a monolithic integrated circuit, as taught by Arambepola, to realize the well-understood benefits of system-on-chip integration.
  • Expectation of Success: The combination was asserted to be a straightforward application of known integration techniques to achieve predictable results.

Ground 8: Obviousness over Favrat, Oku, Eglit, and Wilkie - Claims 20-23 are obvious over Favrat in view of Oku, Eglit, and Wilkie

• Prior Art Relied Upon: Favrat (Patent 7,075,585), Oku (Patent 6,310,654), Eglit (Patent 5,642,139), and Wilkie (Patent 5,526,017).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground addressed claims 20-23, which require complex signal output circuits comprising serializers and various driver circuits. Petitioner relied on Favrat for the base multi-standard receiver architecture. To meet the "serializer circuit" limitation of claim 20, Petitioner cited Eglit, which teaches a processor that retrieves compressed video data and serializes it. For the "differential output driver" limitation, Petitioner cited Wilkie, which discloses a driver circuit that provides a differential analog signal. Oku was cited for its disclosure of various DACs and driver circuits for interfacing with external components like monitors.
  • Motivation to Combine: A POSITA designing a multi-standard receiver like Favrat's would need to output signals to various downstream components. Petitioner argued it would have been obvious to incorporate known interface solutions, such as a serializer from Eglit and differential drivers from Wilkie and Oku, to provide robust and standardized outputs. The combination represented assembling known, predictable components to enable the transfer of multimedia signals.
  • Expectation of Success: The integration of these standard interface components into a receiver system was argued to be well within the skill of a POSITA.

• Additional Grounds: Petitioner asserted additional obviousness challenges, including combinations of Favrat with: Yang (Patent 5,663,768) to add PAL/SECAM/NTSC decoder circuits; Vorenkamp (Patent 7,106,388) to add a variable gain amplifier; and Gray (Patent 4,872,054) to add a low pass filter for artifact removal.

4. Key Claim Construction Positions

Petitioner proposed constructions for several key terms that it argued were critical to the invalidity analysis.

• "RF signal": Construed as "signal having a frequency between 10 kHz and 100 GHz," based on the IEEE standard dictionary definition.
• "format": Construed as "distinct signal format, such as analog or digital," based on the patent’s explicit distinction between "formats" and transmission "standards" (like NTSC or PAL).
• "video and audio baseband signals": Construed as "at least one signal without transmission modulation." This construction was based on the specification's disclosure that a digital demodulator outputs a single MPEG data stream, arguing the plural term "signals" does not require two separate signals for digital formats.
• "signal processor": Construed as a "digital module that processes signals in the digital domain," based on the specification’s consistent description of the processor as a "digital signal processor."

5. Relief Requested

• Petitioner requested the institution of an inter partes review and the cancellation of claims 1-29 of the ’792 patent as unpatentable.