PTAB

IPR2015-00927

Apple Inc v. ZiiLabs Inc

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Petition
petition Intelligence

1. Case Identification

2. Patent Overview

  • Title: Autonomous Address Translation in Graphic Subsystem
  • Brief Description: The ’061 patent relates to computer graphics rendering systems, specifically a graphics processing chip that includes a texture memory management function. This function manages texture data storage across both the host system's main memory and the graphics accelerator's dedicated local memory ("normal texture memory") using virtual memory techniques.

3. Grounds for Unpatentability

Ground 1: Obviousness over Fukushima in view of Hannah - Claims 1-2 are obvious over Fukushima in view of Hannah.

  • Prior Art Relied Upon: Fukushima (Patent 5,369,744) and Hannah (Patent 5,548,709).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Fukushima disclosed a graphics processing system with a memory management unit (MMU) capable of managing data across multiple memory levels (local frame buffer, main memory, and hard disk) using virtualization. While Fukushima taught this advanced memory management, it did not explicitly detail 3D texturing. Hannah, conversely, taught a specialized single-chip texture random access memory (TRAM) with its own local memory (DRAM array) and logic for performing texture mapping. Petitioner asserted that a combined system would use Fukushima's MMU to manage texture data (from Hannah's TRAM) across both host memory (Fukushima's main memory) and normal texture memory (Hannah's DRAM array). For claim 2, Petitioner contended that Fukushima’s virtual memory system inherently supported reading data from noncontiguous physical pages, thus meeting the limitation of reading noncontiguous textures from main memory.
    • Motivation to Combine: A POSITA would combine the references because they addressed complementary aspects of a graphics system. Petitioner argued a POSITA would be motivated to integrate Hannah’s specialized 3D texturing subsystem into Fukushima’s more general graphics processing and virtual memory framework. This combination would predictably add advanced 3D texturing capabilities to Fukushima's system, resulting in improved performance and more realistic imagery.
    • Expectation of Success: Petitioner asserted the combination would have been a routine engineering task with a high expectation of success, as the logical circuit design was predictable and there were no technical incompatibilities between the two systems.

Ground 2: Obviousness over Herrell in view of Priem - Claims 1-2 are obvious over Herrell in view of Priem.

  • Prior Art Relied Upon: Herrell (Patent 5,301,287) and Priem (Patent 7,136,068).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Herrell disclosed a virtual direct memory access (VDMA) interface that allows a graphics subsystem to directly access the host system's virtual memory, including main memory and a swap disk. However, Herrell only described a generic graphics subsystem. Priem disclosed a complete graphics accelerator with its own texture engine, rendering engine, local memory, and a DMA engine for virtualizing its local memory with the system memory. The petition asserted that a POSITA would replace Herrell's generic subsystem with Priem's advanced graphics accelerator. In this combination, Herrell's VDMA interface and Priem's DMA engine would together form the claimed "texture memory management function," managing texture data between the host memory (from Herrell) and the "normal texture memory" (local memory from Priem). For claim 2, Petitioner argued Herrell’s disclosure of performing "block moves" from main memory would be understood by a POSITA to include the capability of reading noncontiguous data.
    • Motivation to Combine: A POSITA would have been motivated to integrate Priem’s high-performance texturing accelerator into Herrell's advanced memory access framework. This would improve the overall system by adding sophisticated 3D graphics capabilities, such as texture processing, which were absent in Herrell's high-level disclosure. The goal was to accelerate graphics processing and achieve better real-life imagery.
    • Expectation of Success: Petitioner contended that replacing a generic component (Herrell's graphics subsystem) with a more specific, improved component (Priem's accelerator) was a routine design choice. The combination was technically feasible and would yield the predictable result of an improved graphics system.

4. Key Claim Construction Positions

  • "texture memory management function" (claims 1, 2): Petitioner argued for the construction "a function of the graphics accelerator that supports virtual memory and paging." This construction was central to the petition's arguments, as it framed the invention in terms of well-known virtual memory techniques widely disclosed in the prior art. Petitioner specifically argued against any construction that would require cache management, asserting that the patent's specification and prosecution history distinguish between memory management and cache management. This distinction allowed Petitioner to map prior art systems that used virtual memory and paging—but not necessarily caching for textures—to the claims.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1 and 2 of the ’061 patent as unpatentable.