PTAB

IPR2015-00932

Apple Inc v. ZiiLabs Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Yield Enhancement of Complex Chips
  • Brief Description: The ’383 patent relates to graphics processing chips containing parallel computational units and a task allocation unit. The task allocation unit is designed to bypass defective computational units, enabling chips with manufacturing defects to remain functional, albeit with reduced performance.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1 and 10 by Stuttard

  • Prior Art Relied Upon: Stuttard (International Publication No. WO 00/62182).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Stuttard discloses every element of claims 1 and 10. Stuttard teaches a graphics data processing system implemented on a single integrated circuit with a plurality of parallel "processing blocks" and "processing elements," which Petitioner contended meet the "plurality of parallelized graphics computational units" limitation. Stuttard further discloses a "fault detection means" that detects faults in a processing block and transfers its function to a redundant block. Petitioner asserted this corresponds to the claimed "task allocation unit programmed to bypass defective ones," as it effectively distributes incoming tasks only among operative units.

Ground 2: Obviousness of Claims 1 and 10 over Floyd in view of Stuttard

  • Prior Art Relied Upon: Floyd (Patent 6,550,020) and Stuttard (WO 00/62182).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Floyd teaches a general-purpose multi-core CPU with a programmable "partial-good logic" that detects defective cores and reroutes instructions to operative ones. While Floyd does not explicitly disclose a graphics processor, Stuttard teaches an analogous parallel processor design and fault tolerance scheme specifically for GPUs. Petitioner contended that applying Floyd’s established yield-enhancement logic to the graphics processor context described by Stuttard would result in the claimed invention.
    • Motivation to Combine: A POSITA would combine Floyd and Stuttard to solve the common, well-known problem of improving manufacturing yields for complex multi-core processors. Both references identify increasing production yield as a primary objective. A POSITA would have recognized that the parallel processing architecture and yield enhancement solutions for CPUs (Floyd) were directly applicable and relevant to the analogous challenges in the GPU field (Stuttard).
    • Expectation of Success: A POSITA would have had a reasonable expectation of success in applying Floyd's logic to a GPU. Stuttard demonstrates that parallel architectures and fault-tolerance techniques were already being successfully employed in graphics processor chips, confirming that the underlying principles were predictably transferable between the CPU and GPU domains.

Ground 3: Obviousness of Claims 1 and 10 over Akrout in view of Stuttard

  • Prior Art Relied Upon: Akrout (Patent 6,785,841) and Stuttard (WO 00/62182).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Akrout teaches a system on a single die with a central processor and a plurality of parallel "attached processors" for "graphics intensive applications." Akrout's system is configured to disable a non-functional processor and enable a redundant one upon failure detection. Stuttard supplements this by teaching specific "fault detection means" for this purpose and explicitly disclosing a method for 3D graphics rendering. The combination of Akrout’s architecture with Stuttard’s specific implementation details for graphics processors renders the claims obvious.
    • Motivation to Combine: The primary motivation was, again, to enhance manufacturing yield, a shared objective of both Akrout and Stuttard. A POSITA would have been motivated to implement the more general fault-tolerant architecture of Akrout using the specific fault-detection and graphics-oriented teachings of Stuttard. The systems were highly similar, and combining them represented a predictable path to improving GPU yields.
  • Additional Grounds: Petitioner asserted that claims 1 and 10 are also obvious over Stuttard alone, arguing that even if Stuttard's "fault detection means" is not explicitly "programmed," it would have been an obvious design choice for a POSITA to implement its functionality using software, hardware, or firmware.

4. Key Claim Construction Positions

  • "Graphics Computational Units": Petitioner argued this term should be construed as "computational subunits within a single graphics processor." This construction was asserted to be consistent with the patent’s specification and arguments made by the Patent Owner during prosecution to distinguish prior art that showed multiple, separate processors rather than subunits within a single processor.
  • "Task Allocation Units Programmed to Bypass Defective Ones": Petitioner proposed the construction "units programmed to recognize and avoid allocating tasks to defective graphics computational units." This interpretation was based on the claim language and the specification’s description of using software device drivers or a "Texture Switch Unit" to recognize functional units and avoid those with manufacturing defects.

5. Key Technical Contentions (Beyond Claim Construction)

  • Invalidity of Patent's Core Premise: Petitioner's central technical argument was that the '383 patent is based on a false premise. The patent's specification suggests that, prior to the invention, graphics chips were "too big to have any spares," negating the "notion of redundancy." Petitioner contended that prior art like Stuttard and Akrout directly contradicts this assertion by explicitly teaching the use of redundant processing units in graphics processor chips to enhance manufacturing yield, demonstrating that this concept was already well-known.

6. Relief Requested

  • Petitioner requested institution of an inter partes review and cancellation of claims 1 and 10 of the ’383 patent as unpatentable.