PTAB
IPR2015-00964
Apple Inc v. ZiiLabs Inc
Key Events
Petition
Table of Contents
petition Intelligence
1. Case Identification
- Case #: IPR2015-00964
- Patent #: 6,111,584
- Filed: March 28, 2015
- Petitioner(s): Apple Inc.
- Patent Owner(s): ZiiLabs Inc., Ltd.
- Challenged Claims: 1, 2, 4, and 6
2. Patent Overview
- Title: Rendering System With Mini-Patch Retrieval From Local Texture Storage
- Brief Description: The ’584 patent relates to a computer graphics rendering system designed to improve the efficiency of retrieving texture data from memory. The technology involves storing texture data in two-dimensional "mini-patches" and retrieving an entire patch from a single memory location as a "wide word," thereby reducing memory access overhead and page breaks that occur with conventional linear memory access patterns.
3. Grounds for Unpatentability
Ground 1: Obviousness over Winser in view of Peachey - Claims 1, 2, 4, and 6 are obvious over Winser in view of Peachey.
- Prior Art Relied Upon: Winser (Patent 5,544,292) and Peachey (a 1990 technical memo titled "Texture On Demand").
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Winser disclosed a graphics rendering system that met nearly all limitations of the challenged claims, including decomposing primitives, computing pixel values, and retrieving 2-D patches (2x2) of texture data for processing. The key limitation that allowed the ’584 patent to issue over Winser was the requirement of retrieving the texture patch "from a single memory location." Petitioner contended that Peachey explicitly taught this missing element. Peachey described a "Texture On Demand" system that stores texture data in 2-D "tiles" and teaches that a tile can be read from memory with a "single I/O operation" from a given file address, directly corresponding to a read from a single memory location.
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Winser and Peachey because both addressed the same well-known problem of improving memory access efficiency for 2-D texture data in graphics rendering. Petitioner asserted that a POSITA would find it logical to incorporate Peachey's more efficient tiled memory architecture into Winser's rendering system to improve performance and simplify Winser's addressing circuitry, which required generating four sub-addresses from a single initial address.
- Expectation of Success: The combination was presented as a routine engineering task, as texture mapping techniques were well-known. A POSITA would have had a high expectation of success in achieving the predictable result of a more efficient rendering system.
Ground 2: Obviousness over Winser in view of Apgar - Claims 1, 2, 4, and 6 are obvious over Winser in view of Apgar.
Prior Art Relied Upon: Winser (Patent 5,544,292) and Apgar (a 1988 article in Computer Graphics titled "A Display System for the Stellar Graphics Supercomputer Model GS1000").
Core Argument for this Ground:
- Prior Art Mapping: This ground presented an alternative combination to prove the same point as Ground 1. As with the first ground, Winser was asserted to teach most claim limitations. Here, Apgar was used to supply the "single memory location" limitation. Apgar disclosed a Virtual Pixel Map (VPM) rendering technique where pixels were stored in rectangular 4x4 blocks. Apgar taught that these blocks could be held in a single main memory location and retrieved in one memory access, which yielded "more useful pixels per memory access." Furthermore, Apgar explicitly taught the computation of pixel color and depth ("Z coordinates") values, strengthening the argument that computing depth was an obvious element of the rendering process.
- Motivation to Combine: A POSITA would combine Winser and Apgar because both were directed at high-performance computer graphics and 2-D texture processing. It would have been obvious to integrate Apgar's efficient block-based memory access scheme into Winser's rendering pipeline to improve performance. The combination would create a more capable system that explicitly handled depth calculations, a standard requirement for 3-D graphics.
- Expectation of Success: Integrating Apgar's known memory access method into Winser's rendering system was argued to be a straightforward modification for a POSITA, with a predictable outcome of enhanced performance.
Additional Grounds: Petitioner also asserted an obviousness challenge over Winser in view of Peachey and further in view of Apgar, arguing that Apgar reinforced the motivation to compute pixel depth values and provided another example of block-based texture retrieval from a single memory location.
4. Key Claim Construction Positions
Petitioner dedicated significant argument to the construction of terms that were central to overcoming the prior art during prosecution.
- "retrieving at least four pixels of a stored texture from a single memory location...": Petitioner argued this term, added during prosecution to secure allowance over Winser, should be construed to mean fetching a set of texture data from one location in memory via a single memory "access." This construction was crucial because Petitioner’s core argument was that while Winser may not have taught this, both Peachey and Apgar did.
- "said pixels of each said word being grouped in said stored texture in a pattern which is more than one pixel wide and more than one pixel high": Petitioner proposed this term means the retrieved word corresponds to a 2-D set of texture pixels. Petitioner also noted that during prosecution, the Patent Owner argued this required "the actual physical grouping of the pixels in memory." Petitioner contended that its proposed prior art combinations would meet the limitation under either interpretation.
5. Relief Requested
- Petitioner requested institution of an inter partes review and cancellation of claims 1, 2, 4, and 6 of the ’584 patent as unpatentable under 35 U.S.C. §103.
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