PTAB

IPR2015-01028

Samsung Electronics Co Ltd v. NVIDIA Corp

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Petition
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1. Case Identification

2. Patent Overview

  • Title: Transform, lighting and rasterization system embodied on a single semiconductor platform
  • Brief Description: The ’488 patent relates to graphics pipeline systems that include transform, lighting, and rasterization modules. The patent asserts its novelty is the integration of these well-known modules onto a single semiconductor chip to increase speed and overcome the cost-prohibitive nature of prior art single-chip implementations.

3. Grounds for Unpatentability

Ground 1: Claims 1 and 20 are anticipated by Deering under 35 U.S.C. §102(e).

  • Prior Art Relied Upon: Deering (Patent 6,424,343).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Deering disclosed every element of the challenged claims. Deering described a high-performance graphics system configurable as a single-chip device that includes multiple parallel "rendering units." These rendering units were taught to perform transformation, lighting, and screen-space rendering (rasterization) of graphics primitives. Petitioner contended this structure met the limitations of a transform module, a lighting module, and a rasterizer positioned on a single semiconductor platform. Furthermore, Deering’s "control unit" was alleged to meet the "sequencer" limitation by dividing a stream of data into parallel streams routed to the individual rendering units (logic units) for parallel processing.

Ground 2: Claims 1 and 20 are obvious over the TI Data Sheet and the TI Article under 35 U.S.C. §103(a).

  • Prior Art Relied Upon: Texas Instruments, “TMS320C80 Digital Signal Processor Data Sheet” (the “TI Data Sheet”) and Texas Instruments, “Faster Scan Conversion Using the TMS320C80” (the “TI Article”).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that the combination of the TI references rendered the claims obvious. The references collectively described the TMS320C80, a single-chip, parallel processor optimized for graphics applications. The chip contained a master processor (MP) and four parallel processors (ADSPs). The TI Article explicitly described using these multiple processors on the chip to perform the key graphics pipeline operations of transformation and rasterization, and also disclosed shading (lighting). The master processor was taught to function as a sequencer, partitioning data and sending it to the parallel processors (logic units) to execute multiple threads of operation in parallel. This single-chip architecture, with its MP acting as a sequencer and its ADSPs as logic units performing the claimed transform, lighting, and rasterization functions, allegedly met all claim limitations.
    • Motivation to Combine: A POSITA would combine the TI references because they described the same product. The TI Article detailed a specific graphics processing application using the exact TMS320C80 digital signal processor whose technical specifications were provided in the TI Data Sheet. A POSITA implementing the application described in the Article would have naturally consulted the Data Sheet for essential information about the chip's architecture and capabilities.
    • Expectation of Success: A POSITA would have had a high expectation of success. The combination did not require modification of either reference but simply involved using the TMS320C80 chip as described in its own data sheet to perform the graphics processing tasks for which it was explicitly designed and which were detailed in the application-focused TI Article.

4. Key Claim Construction Positions

  • "single semiconductor platform": Petitioner argued for the construction adopted in a related ITC Action, which was based on the Patent Owner's own contention: a "sole unitary semiconductor based integrated circuit or chip." This construction was central to the invalidity arguments, as both primary prior art references (Deering and the TI combination) described single-chip graphics processing systems that allegedly met this limitation.
  • "transforming": Petitioner asserted the term's plain and ordinary meaning, consistent with the specification, is "converting vertex data from object space to screen space."
  • "lighting": Petitioner asserted the term's plain and ordinary meaning, consistent with the specification, is "setting the color and appearance of a vertex based on various lighting schemes."

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1 and 20 of the ’488 patent as unpatentable.