PTAB
IPR2015-01029
Samsung Electronics Co Ltd v. NVIDIA Corp
Key Events
Petition
Table of Contents
petition Intelligence
1. Case Identification
- Case #: IPR2015-01029
- Patent #: 6,992,667
- Filed: April 9, 2015
- Petitioner(s): Samsung Electronics Co., Ltd., Samsung Electronics America, Inc., and Samsung Semiconductor, Inc.
- Patent Owner(s): NVIDIA Corporation
- Challenged Claims: 1-29
2. Patent Overview
- Title: Single semiconductor graphics platform system and method with skinning, swizzling and masking capabilities
- Brief Description: The ’667 patent discloses a graphics processing system that integrates transform, lighting, and rasterization modules onto a single semiconductor platform. The patent alleges its novelty lies in this single-chip integration, which it describes as previously "cost prohibitive," and in the chip's capability to perform skinning, swizzling, and masking operations for 3D graphics rendering.
3. Grounds for Unpatentability
Ground 1: Obviousness over Rixner and Lander - Claims 1-9 are obvious over Rixner in view of Lander.
- Prior Art Relied Upon: Rixner ("A Bandwidth-Efficient Architecture for Media Processing," 1998) and Lander ("Skin Them Bones: Game Programming for the Web Generation," May 1998).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Rixner disclosed the core claimed invention: a programmable, single-chip media processor (the "Imagine processor") that performs the traditional graphics pipeline stages of transforming, lighting, and rasterization on a single semiconductor platform. While Rixner did not detail a "skinning operation," Lander taught well-known skinning techniques for deforming 3D meshes using matrix and weighting value calculations, which are mathematically similar to the vertex transformations Rixner’s processor was designed to perform.
- Motivation to Combine: A POSITA would combine Lander's conventional skinning algorithms with Rixner's system because Rixner’s programmable vertex transformation kernel was an ideal and intended platform for implementing such graphics transformations. Petitioner asserted it would have been "common sense" to use Rixner's flexible architecture to perform the skinning algorithms taught by Lander to create more realistic 3D graphics.
- Expectation of Success: The programmable nature of Rixner's arithmetic clusters and transformation kernel would have made it straightforward for a POSITA to implement Lander's established skinning algorithms, ensuring a high expectation of success.
Ground 2: Obviousness over Rixner and Lee - Claims 10-19 are obvious over Rixner in view of Lee.
- Prior Art Relied Upon: Rixner (1998) and Lee ("Subword Parallelism with MAX-2," Aug. 1996).
- Core Argument for this Ground:
- Prior Art Mapping: Rixner provided the foundational single-chip graphics processor. Lee described the MAX-2 multimedia instruction set extensions, which included "mix" and "permute" instructions for rearranging data elements—i.e., performing a "swizzling operation." Lee explicitly taught using these swizzling instructions to improve the efficiency of graphics operations, such as matrix calculations used in vertex transformations.
- Motivation to Combine: Petitioner argued that Rixner expressly suggested this combination. Rixner’s publication stated its processor supports instructions "found in MMX ... and other multimedia extensions" and directly cited the Lee article as a reference for such extensions. Therefore, implementing Lee’s swizzling operations on Rixner’s processor was a straightforward application of Rixner’s express teachings.
- Expectation of Success: Because Rixner explicitly contemplated the use of multimedia extensions like those described in Lee, a POSITA would have had a very high expectation of successfully integrating Lee's swizzling instructions into Rixner's programmable processor.
Ground 3: Obviousness over Rixner and Tremblay - Claims 20-28 are obvious over Rixner in view of Tremblay.
- Prior Art Relied Upon: Rixner (1998) and Tremblay ("VIS Speeds New Media Processing," Aug. 1996).
- Core Argument for this Ground:
- Prior Art Mapping: Rixner again supplied the single-chip processor architecture. Tremblay described the "UltraSparc's Visual Instruction Set" (VIS), which included a "partial-store instruction using mask." This instruction performs a "masking operation" by using a mask to selectively write certain data components to memory, a fundamental operation in graphics algorithms.
- Motivation to Combine: As with the Lee combination, Rixner’s publication expressly suggested incorporating multimedia extensions and directly cited the Tremblay article as a reference. Petitioner contended that combining Tremblay’s masking operations with Rixner’s processor was therefore not just obvious but explicitly contemplated by the primary prior art reference.
- Expectation of Success: The express reference to Tremblay's VIS extensions in Rixner provided a clear roadmap for implementation, leading to a high expectation of success for a POSITA.
- Additional Grounds: Petitioner asserted an additional obviousness challenge for claim 29 over the combination of Rixner, Lander, Lee, and Tremblay. This ground argued that claim 29, which combines the skinning, swizzling, and masking limitations and adds a "set-up" module, was obvious because Rixner's own architecture explicitly disclosed a "Span Setup" module, and the motivations to combine the other references remained the same.
4. Key Claim Construction Positions
- "single semiconductor platform": Petitioner argued this term should be construed as a "sole unitary semiconductor-based integrated circuit or chip," consistent with the Patent Owner's position in related litigation. This construction was central to mapping the term to Rixner's "single-chip media processor."
- "skinning operation": Proposed as "a blending operation that adds realism to segmented polygonal objects." This broad, functional definition was used to show that the techniques in Lander fell within the scope of the claim.
- "swizzling operation": Proposed as "an operation for rearranging elements." This construction was broad enough to encompass the "mix" and "permute" instructions taught by Lee.
- "masking operation": Proposed as "a bitwise operation that retains or suppresses portions of data." This construction was intended to cover the "partial-store instruction using mask" disclosed by Tremblay.
5. Relief Requested
- Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 1-29 of Patent 6,992,667 as unpatentable under 35 U.S.C. §103.
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