PTAB

IPR2015-01081

American Megatrends Inc v. Kinglite Holdings Inc

Key Events

Petition

Title: System for Executing Instructions in System Management Mode (SMM)
Brief Description: The ’604 patent describes a system and method for executing instruction sequences on an x86-compatible processor. The invention allows a System Management Interrupt (SMI) handler to configure the processor to operate in protected mode and virtual mode while remaining in SMM, enabling code execution above the conventional 1 MB memory boundary.

Prior Art Relied Upon: Collins (a May 1997 article titled "The Caveats of Pentium System Management Mode") and the Pentium Manual (a 1995 Intel developer's manual).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Collins explicitly taught the core concept of the ’604 patent by stating that a processor is "capable of entering protected mode, v86 [virtual] mode...if the SMM handler was programmed to do such a thing." The Pentium Manual provided the necessary architectural details for the processor discussed in Collins, disclosing a dedicated memory space (SMRAM) for the SMM handler, the ability to access the full 4GB address space while in SMM, and the mechanics of switching from protected mode to virtual mode.
- Motivation to Combine: A POSITA reading Collins, which specifically discusses advanced possibilities for the Pentium processor in SMM, would be motivated to consult the official Pentium Manual to understand the processor's architecture and capabilities in order to implement the functions described.
- Expectation of Success: The combination of a reference suggesting a capability (Collins) with the official manual detailing how the underlying processor functions (Pentium Manual) would provide a clear path and a high expectation of success for a POSITA.

Prior Art Relied Upon: Favor (Patent 6,093,213) and the Am486 Manual (a 1995 AMD processor manual).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner asserted that Favor, an AMD patent, disclosed a flexible SMM implementation where "all x86 architectural features and instructions are available for use," which included protected and virtual modes. The Am486 Manual, describing the target processor, detailed its four operating modes (Real, Virtual, Protected, and SMM) and its memory management capabilities, including paging and accessing memory above the 1 MB limit.
- Motivation to Combine: A POSITA seeking to implement the flexible SMM system disclosed in Favor would naturally consult the processor manual for the corresponding AMD processor family (Am486) to obtain the necessary architectural details for a working implementation.
- Expectation of Success: Because both references originated from AMD and concerned the same processor architecture, their combination would have been straightforward for a POSITA with a high expectation of success.

Prior Art Relied Upon: Wooten 1 (Patent 5,644,755).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued Wooten 1 disclosed every element of the challenged claims. Wooten 1 taught a "virtual system mode (VSM)," which Petitioner contended was a form of SMM. The reference explicitly described a processor with standard user modes plus VSM, stating that protected mode is the "preferred mode of operation" in conjunction with VSM. Wooten 1 further disclosed that this operation provides access to memory management features like paging, operates with a 4GB memory limit (thus teaching operation above 1 MB), and allows the creation of a "virtual 8086 mode" environment from within protected mode.
Additional Grounds: Petitioner asserted further obviousness challenges, including: (1) adding the IBM 6x86 Manual to the Collins and Pentium Manual combination to more explicitly teach configuring a processor into protected mode while in SMM; (2) combining the Am486 Manual with the IBM 6x86 Manual; and (3) adding the Intel Architecture Software Developer's Manual to the Collins and Pentium Manual combination to address dependent claims 5-10, 15-20, and 25-30.

The petition argued for constructions based on the broadest reasonable interpretation (BRI) standard as understood by a POSITA at the time of the invention.
"Protected mode": Proposed construction was "a mode of processor operation in which an 80286 or later generation microprocessor can access the largest possible amount of memory for running a program, including memory above the first 1 Megabyte of memory." This construction was central to applying prior art that taught operation above the 1 MB memory limit.
"System management mode (SMM)": Proposed construction was "an operating mode of an 80386 and later generation microprocessor in which special separate software for managing system interrupts is executed from memory." This construction was intended to be broad enough to encompass alternative system management schemes like the "VSM" taught in Wooten 1.

A central technical contention woven throughout the petition was that SMM was not a limited, isolated mode as implied by the ’604 patent. Petitioner argued that prior art, particularly the processor manuals from Intel, AMD, and IBM, established that SMM was an orthogonal CPU state. From this state, a programmer could access all other architectural features of the x86 processor, including entering protected and virtual modes. The petition contended that the ’604 patent did not invent this capability but merely implemented a known, if not commonly used, feature of existing microprocessors.

Petitioner requested institution of an inter partes review and cancellation of claims 1-30 of Patent 5,987,604 as unpatentable.