Dell Inc v. Realtime Data LLC

1. Case Identification

• Case #: IPR2016-00878
• Patent #: 7,415,530
• Filed: April 22, 2016
• Petitioner(s): Dell Inc.; Riverbed Technology, Inc.; SAP America, Inc.; Sybase, Inc.; Hewlett-Packard Enterprise Co.; HP Enterprise Services, LLC; Teradata Operations, Inc.; Echostar Corporation; and Hughes Network Systems, LLC
• Patent Owner(s): Realtime Data LLC d/b/a IXO
• Challenged Claims: 1-5, 9-12, 14, 18, 19, and 24

2. Patent Overview

• Title: Data Compression and Decompression for Storage Systems
• Brief Description: The ’530 patent relates to data compression and decompression techniques for data storage systems. The invention describes a "data storage accelerator" that uses one or more compression encoders to store compressed data, allegedly allowing data compression and storage to occur faster than storing the data in its uncompressed form.

3. Grounds for Unpatentability

Ground 1: Obviousness of Claims 1, 9-11, 14, and 18 over Franaszek in view of Osterlund

• Prior Art Relied Upon: Franaszek (Patent 5,870,036) and Osterlund (Patent 5,247,646).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Franaszek taught nearly all limitations of independent claim 1. Franaszek disclosed a system for compressing and decompressing data using a plurality of compression mechanisms, where different data blocks can be compressed with different techniques. It also taught storing a descriptor with each compressed block to identify the compression method used. Petitioner asserted that Osterlund supplied the only key limitation missing from Franaszek: that "compression and storage occurs faster than said data stream is able to be stored on said memory device in said received form." Osterlund described a data compression device interposed between a host and a storage controller that permits "overall faster rates of data storage and retrieval" by reducing the amount of data that must be stored.
  • Motivation to Combine: Petitioner contended that a person of ordinary skill in the art (POSITA) would combine Osterlund’s teaching of accelerated storage with Franaszek’s adaptive compression system to achieve the predictable benefits of faster and more efficient data storage. This combination would solve the known problem of system latency and provide an improved end-user experience by applying a known technique (accelerated storage) to a similar system (Franaszek) to obtain predictable results.
  • Expectation of Success: A POSITA would have had a reasonable expectation of success because the field of data compression was well-established and predictable, allowing for algorithms and transmission times to be easily modeled, simulated, and tested.

Ground 2: Obviousness of Claim 24 over Franaszek, Osterlund, Clark, and Rynderman

• Prior Art Relied Upon: Franaszek (Patent 5,870,036), Osterlund (Patent 5,247,646), Clark (Patent 5,319,682), and Rynderman (Patent 5,563,961).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground challenged independent claim 24, which added limitations related to managing data bandwidth. Petitioner relied on the Franaszek and Osterlund combination from Ground 1 to teach the base system. To meet the added limitations, Petitioner asserted that Clark taught determining the bandwidth of the received data stream by measuring the input data rate to optimize encoder performance and avoid overwhelming the processor. Petitioner further argued that Rynderman taught the final key limitation: adjusting the data rate of the compressed data stream by modifying a system parameter (the compression rate) to make the output bandwidth compatible with the bandwidth of the memory device.
  • Motivation to Combine: A POSITA would be motivated to combine these known optimization techniques to improve the performance and flexibility of the Franaszek system. Implementing Clark’s input bandwidth monitoring would allow for more efficient use of processing resources. Incorporating Rynderman’s adaptive output control would make the system compatible with a wider variety of memory devices. The combination was presented as a collection of known solutions to solve known problems, yielding only predictable improvements in system usability.
  • Expectation of Success: Success was expected because the combination involved applying well-understood data compression optimization techniques to a standard data compression architecture to achieve predictable improvements in performance and compatibility.

• Additional Grounds: Petitioner asserted additional obviousness challenges based on the Franaszek/Osterlund combination supplemented with other references for specific dependent claims. These included claims 2-5 in view of Fall (Patent 5,991,515), claim 12 in view of Assar (Patent 5,479,638), and claim 19 in view of Crawford (Patent 5,771,354).

4. Key Claim Construction Positions

• Petitioner argued for a construction of the term "bandwidth," as used in claim 24, to mean "the speed at which data is or can be transmitted or stored, and may be quantified as a certain number of bits per second." This construction was asserted to be consistent with its usage in the patent’s specification and necessary to understand the limitations related to determining the input stream bandwidth and adjusting the output stream bandwidth to be compatible with a memory device.

5. Arguments Regarding Discretionary Denial

• Petitioner briefly argued that discretionary denial under 35 U.S.C. §325(d) would be inappropriate. Petitioner contended that while other IPRs had been filed against a related patent, this petition presented different prior art references and substantially different arguments, and therefore should be considered on its merits.

6. Relief Requested

• Petitioner requested the institution of an inter partes review and the ultimate cancellation of claims 1-5, 9-12, 14, 18, 19, and 24 of the ’530 patent as unpatentable.