PTAB

IPR2016-01400

Intel Corp v. Future Link Systems LLC

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1. Case Identification

2. Patent Overview

  • Title: Power Management For Buses In CMOS Circuits
  • Brief Description: The ’614 patent relates to a method and apparatus for managing power in electronic circuits by controlling the shutdown of functional blocks. The invention specifically addresses preventing "passive forward biasing," a parasitic current draw caused by input signals applied to a powered-down block, by switching those input signals to a low-power state for the duration of the power-down event.

3. Grounds for Unpatentability

Ground 1: Obviousness over Taniguchi - Claims 1, 4-6, 10-11, 14, and 16-17 are obvious over Taniguchi

  • Prior Art Relied Upon: Taniguchi (European Patent Application # EP 1 491 988).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Taniguchi discloses all elements of the independent method (claim 1) and apparatus (claim 10) claims, as well as their dependents. Taniguchi teaches a semiconductor integrated circuit where a microcomputer determines when a given functional block (e.g., a signal processing circuit) is not in use. Upon this determination, the microcomputer signals a separate power supply control circuit to halt power to the unused block. Critically, Taniguchi also discloses that the microcomputer, acting as the claimed "initiator circuit," switches the inter-block data signals it sends to the powered-down block to a fixed low-power state. This switching is triggered by the power-down decision and prevents potential damage from high-level signals being applied to an unpowered circuit.
    • Key Aspects: Petitioner contended that Taniguchi's disclosure directly mirrors the core inventive concept of the ’614 patent. It was specifically argued that the inter-block data signal in Taniguchi is separate from and "unrelated to a power down command," a key limitation added during prosecution of the ’614 patent. In Taniguchi, the power down command is a distinct power cutoff signal from the power supply control circuit, whereas the "first signal" is a data/control signal from the microcomputer.

Ground 2: Obviousness over Taniguchi in view of Fujii - Claims 2-3 and 12-13 are obvious over Taniguchi in view of Fujii

  • Prior Art Relied Upon: Taniguchi (European Patent Application # EP 1 491 988) and Fujii (Patent 6,140,836).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that this combination renders obvious the claims requiring the powered-down functional block to effect a communication protocol. Claims 2 and 12 require the block to effect "at least part of a communication protocol," while claims 3 and 13 specify that protocol is a "two-phase data transfer protocol." Petitioner argued that while Taniguchi’s signal processing circuit would inherently operate using some protocol, Fujii explicitly discloses using specific communication protocols to manage power in CMOS circuits. Fujii teaches an asynchronous signal control circuit that uses a "two-phase handshaking protocol" to generate activation signals that turn individual circuits on or off to reduce power dissipation and leakage current.
    • Motivation to Combine: A POSITA would combine Taniguchi and Fujii because both references are in the same technical field (CMOS circuit power management) and address the identical problem of reducing power leakage in inactive circuits. A POSITA implementing Taniguchi's power-gating system would have been motivated to incorporate a well-known communication protocol to manage the inter-block signaling. Fujii provides an explicit example of such a protocol—a two-phase handshaking system—used for the exact same purpose. Applying Fujii's efficient and known protocol to Taniguchi's system would have been a simple substitution of one known element for another to obtain predictable results.
    • Expectation of Success: The combination involved applying a known technique (Fujii's communication protocol) to a known system ready for improvement (Taniguchi's power-gating architecture), ensuring a high expectation of success.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-6, 10-14, and 16-17 of the ’614 patent as unpatentable.