PTAB

IPR2016-01621

Kingston Technology Co Inc v. Polaris Innovations Ltd

Log In
Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: DRAM Refresh Timing Adjustment Device, System and Method
  • Brief Description: The ’057 patent describes a dynamic random access memory (DRAM) apparatus that adjusts its data refresh rate based on its operating temperature. The apparatus includes a semiconductor package containing a DRAM array, a temperature sensor in thermal communication with the array, and at least one connection pin to provide a temperature-indicative signal to external circuitry.

3. Grounds for Unpatentability

Ground 1: Claims 1-17 are obvious over Atkinson in view of Broadwater

  • Prior Art Relied Upon: Atkinson (Patent 6,134,167) and Broadwater (Patent 4,970,497).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Atkinson taught nearly all limitations of the challenged claims, including a DRAM system within a semiconductor package that uses a temperature sensor (e.g., a thermistor) to vary the memory refresh rate. Specifically, Atkinson disclosed that the refresh rate increases as temperature increases and decreases as temperature decreases to save power. However, Petitioner contended Atkinson did not explicitly teach coupling the temperature sensor to a connection pin to provide the temperature signal to external circuitry. Petitioner asserted that Broadwater remedied this deficiency. Broadwater, which addresses sensing thermal stress in integrated circuits, explicitly taught that a temperature-indicative signal could be "brought out to an external terminal of the chip package" or an "external pin of the chip package." The combination of Atkinson's temperature-responsive refresh system with Broadwater's external signal output rendered the claims obvious.
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would combine Atkinson and Broadwater to enhance thermal management and system reliability. Broadwater counseled that thermal stress is a significant problem in semiconductor chips that can prevent reliable operation, particularly in high-stakes applications like aircraft control systems where DRAM is used. A POSITA would have been motivated to add Broadwater's external temperature signal output to Atkinson's existing temperature sensor to allow external systems (e.g., cooling fans, power throttling controllers) to monitor and react to the DRAM's temperature, thereby improving overall system stability.
    • Expectation of Success: Petitioner asserted a POSITA would have had a high expectation of success. The underlying DRAM and temperature-sensing technology was mature by the patent’s priority date. The proposed modification was not complex, involving only the addition of a well-known external connection pin to an existing temperature sensor circuit, as taught by Broadwater.

Ground 2: Claims 1-17 are obvious over Tillinghast in view of Broadwater

  • Prior Art Relied Upon: Tillinghast (Patent 5,278,796) and Broadwater (Patent 4,970,497).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner highlighted that Tillinghast was considered by the examiner during the original prosecution of the ’057 patent. Tillinghast disclosed a DRAM array that uses a temperature sensor to enable a "reduced refresh rate based on the temperature of the DRAM array," thereby reducing power consumption. Petitioner argued that the claims were allowed over Tillinghast only after the applicant added the limitation of providing the temperature signal to external circuitry via a connection pin. However, the examiner did not have the benefit of Broadwater. As in the first ground, Petitioner relied on Broadwater to explicitly teach outputting a temperature signal from a chip package to an external pin. Therefore, the combination of Tillinghast and Broadwater taught every element of the challenged claims.
    • Motivation to Combine: The motivation was identical to that for combining Atkinson with Broadwater. A POSITA would have recognized the benefits of applying Broadwater's external thermal monitoring technique to Tillinghast’s power-saving, temperature-aware DRAM system. This would allow for more robust thermal management of the entire system in which the DRAM was a component, addressing the reliability concerns raised in Broadwater.
    • Expectation of Success: Success was reasonably expected because the combination required only adding an external pin to Tillinghast's existing temperature-sensing circuit, a straightforward modification for a POSITA at the time. Modifying Tillinghast to implement Broadwater's thermal protection approach would have posed no significant technical difficulties.

  • Additional Grounds: Petitioner asserted additional obviousness challenges, including that claims 1-17 are obvious over Atkinson alone, arguing that adding an external pin was an obvious design choice. Petitioner also challenged claims 1-17 as obvious over Kodama (Patent 3,851,316) in view of either Lee ’970 (Patent 5,229,970) or Broadwater, leveraging the very early disclosure of temperature-based refresh cycle adjustment from Kodama (filed in 1973).

4. Relief Requested

  • Petitioner requested the institution of an inter partes review and cancellation of claims 1-17 of the ’057 patent as unpatentable under 35 U.S.C. §103.