PTAB

IPR2017-00100

Samsung Electronics Co Ltd v. Infobridge Pte Ltd

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petition

1. Case Identification

2. Patent Overview

  • Title: Method and Apparatus for Processing Video Signal
  • Brief Description: The ’772 patent relates to a method for constructing a merge candidate list for a current block during video encoding or decoding, specifically in a "merge mode." The technology is central to video compression standards like High Efficiency Video Coding (HEVC), where motion information for a current prediction unit is derived from neighboring spatial and temporal candidate blocks to improve coding efficiency.

3. Grounds for Unpatentability

Ground 1: Anticipation over WD4 - Claims 8-9 are anticipated by WD4 under 35 U.S.C. §102.

  • Prior Art Relied Upon: WD4 (JCTVC-F803, version 4, a working draft of the HEVC standard).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that WD4 discloses every limitation of claims 8 and 9. WD4 describes constructing a "mergeCandList" by checking the availability of five spatial candidate blocks (A0, A1, B0, B1, B2) and a temporal candidate block ("Col"). It details adding available candidates to the list and, if the number of candidates is less than a predetermined maximum (e.g., 5), adding supplemental candidates like zero motion vectors. Critically, Petitioner asserted WD4 teaches setting a spatial merge candidate as unavailable if the current block is a second prediction unit created by asymmetric partitioning. For dependent claim 8, Petitioner mapped the temporal motion vector prediction process in WD4, which derives a motion vector for the temporal candidate from a co-located block in a temporal candidate picture. For dependent claim 9, Petitioner mapped the process for deriving the reference picture index, which WD4 discloses is set to 0 under certain conditions.

Ground 2: Obviousness over WD4 and Zhou - Claim 8 is obvious over WD4 in view of Zhou.

  • Prior Art Relied Upon: WD4 (JCTVC-F803) and Zhou (JCTVC-F081, a contribution to the HEVC standard development).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted this ground in the alternative, should the Patent Owner argue for a narrow construction of claim 8. Specifically, if claim 8 is interpreted to require that the position of the temporal merge candidate block is determined from among available temporal candidate blocks, Zhou explicitly teaches this concept. Zhou describes selecting between two potential temporal merge candidates ("H" and "BR") based on the current block’s position within the Largest Coding Unit (LCU), deeming one unavailable if the current block is adjacent to a lower LCU boundary.
    • Motivation to Combine: A POSITA would combine WD4 and Zhou as both were contemporaneous documents directed at the same problem in the same technical field—the development of the HEVC standard. A POSITA would look to Zhou's technique for selecting temporal candidates to improve the WD4 process, specifically to reduce the memory bandwidth required to fetch co-located motion data, a well-understood goal in video compression.
    • Expectation of Success: A POSITA would have a high expectation of success, as Zhou was submitted for the express purpose of incorporation into the HEVC standard and addresses the same technical framework as WD4.

Ground 3: Obviousness over WD4, Zhou, and WD3 - Claim 9 is obvious over WD4 and Zhou in view of WD3.

  • Prior Art Relied Upon: WD4 (JCTVC-F803), Zhou (JCTVC-F081), and WD3 (JCTVC-E603, an earlier HEVC working draft).

  • Core Argument for this Ground:

    • Prior Art Mapping: Building on Ground 2, this ground addresses a potential narrow construction of claim 9 requiring the reference picture index of the temporal merge candidate to always be set to 0. While WD4 discloses setting the index to 0 conditionally, WD3—an earlier working draft—discloses an implementation where the temporal reference picture index is always set to 0 as an input to the temporal motion vector prediction process.
    • Motivation to Combine: A POSITA would be motivated to modify the WD4/Zhou combination with the teaching from WD3 because it represents one of a finite number of predictable solutions for handling the reference picture index. During HEVC development, both deriving the index (WD4) and fixing it to 0 (WD3) were known, competing design choices. The motivation for choosing the WD3 approach would be to reduce implementation complexity without significant loss of coding efficiency.
    • Expectation of Success: The combination was a predictable design choice with a high expectation of success, as it represented a known trade-off between complexity and performance being actively evaluated by the HEVC standards committee.

  • Additional Grounds: Petitioner asserted additional obviousness challenges, including that claims 8-9 are obvious over WD4 and Han (an IEEE paper also submitted as JCTVC-A124) to the extent WD4 is found not to explicitly label certain partitions as "asymmetric." Further grounds combined WD4, Han, and Zhou for claim 8, and WD4, Han, Zhou, and WD3 for claim 9, relying on similar alternative construction theories.

4. Key Technical Contentions (Beyond Claim Construction)

  • Priority Date Challenge: Petitioner contended that the ’772 patent is not entitled to the November 7, 2011 priority date of its parent Korean application (’219 KR application) for two primary reasons. First, Petitioner argued there is no common inventorship between the ’772 patent and the priority application as required by 35 U.S.C. §119(a). Second, it argued the ’219 KR application lacks written description support for the claim 9 limitation that the temporal merge candidate’s reference picture index is 0. This contention, if successful, establishes that WD4, Zhou, and WD3 are prior art under §102(b) or §102(a) regardless of the patent's priority claim.

5. Relief Requested

  • Petitioner requests institution of inter partes review and cancellation of claims 8 and 9 of Patent 8,917,772 as unpatentable.