PTAB

IPR2017-00868

SanDisk LLC v. Memory Technologies LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Method for Permanent Write Protection of a Memory Card
  • Brief Description: The ’370 patent discloses a method and apparatus for enabling permanent write protection for a portion of a memory card, such as a Multimedia Card (MMC). The invention focuses on redefining an existing write-protection command (e.g., SET_WRITE_PROT) by setting a specific bit in a data register, which causes the command to create a permanent, non-cancellable write protection state for a designated part of the memory.

3. Grounds for Unpatentability

Ground 1: Anticipation - Claims 1-3, 5-6, 12-17, and 25 are anticipated by Chevallier under 35 U.S.C. §102.

  • Prior Art Relied Upon: Chevallier (Application # 2004/0083346).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Chevallier discloses every limitation of the challenged claims. Chevallier teaches a flash memory device with both a temporary "lock" function and a permanent "secure" function. Critically, Chevallier discloses that the same command can initiate either temporary or permanent protection. The function is determined by the state of a "secure function bit" in a control register. Setting this bit (e.g., to '1') enables the permanent secure function, effectively redefining the command's outcome to create a permanent write protection that cannot be cleared. This single reference allegedly teaches the core claimed method of setting a bit in a data register to redefine a command to provide permanent, non-removable write protection for a part of the memory.

Ground 2: Obviousness over Chevallier and Toombs - Claims 1-7, 12-19, and 25 are obvious over Chevallier in view of Toombs under 35 U.S.C. §103.

  • Prior Art Relied Upon: Chevallier (Application # 2004/0083346) and Toombs (Patent 6,279,114).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Chevallier provides the fundamental concept of using a bit to toggle a command between temporary and permanent write protection. Toombs provides the specific context of the MMC standard, teaching the use of a Card Specific Data (CSD) register to store configuration bits (e.g., PERM_WRITE_PROTECT and WP_GRP_ENABLE) that control write protection commands. Toombs further discloses organizing memory into "memory groups" whose size is defined by parameters stored in the CSD register (e.g., WP_GRP_SIZE). The combination of Chevallier’s redefinable command with Toombs’s established MMC architecture and memory group hierarchy allegedly renders the claims obvious.
    • Motivation to Combine: A POSITA would combine the references to implement Chevallier's flexible protection scheme within the well-defined and widely adopted MMC standard taught by Toombs. This would provide the benefits of Chevallier’s dual-mode protection while leveraging the standardized register structure of Toombs. Furthermore, applying protection to Toombs's "memory groups" rather than Chevallier's individual blocks would be more efficient, reducing the number of bits required in a control word to specify the protected memory regions.
    • Expectation of Success: The combination would yield a predictable result. Integrating Chevallier's "secure function bit" into the CSD register of a Toombs-like MMC would predictably result in a system where setting the bit causes a standard write-protect command to create a permanent lock on specified memory groups.

Ground 3: Obviousness over Chevallier, Toombs, and Estakhri - Claim 25 is obvious over the Chevallier-Toombs-Estakhri combination under §103.

  • Prior Art Relied Upon: Chevallier (Application # 2004/0083346), Toombs (Patent 6,279,114), and Estakhri (Patent 6,262,918).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground specifically addressed the "memory device having stored thereon instructions" limitation of independent claim 25. Petitioner contended that the Chevallier-Toombs combination teaches the method steps. Estakhri supplies the missing element by disclosing a standard flash memory architecture that includes a microprocessor and a storage unit for containing the controller's firmware (i.e., stored instructions) for executing memory operations.
    • Motivation to Combine: A POSITA would find it obvious to implement the control logic from the Chevallier-Toombs combination as firmware on a controller, as taught by Estakhri. This was a conventional design choice for memory devices, allowing for flexible and efficient control of memory functions.
    • Expectation of Success: Storing the instructions for the claimed method in firmware on an Estakhri-like controller would be a routine implementation for a POSITA with a high and predictable likelihood of success, resulting in a device capable of performing the functions of claim 25.
  • Additional Grounds: Petitioner asserted as an alternative ground that claims 1-3, 5-6, 12-17, and 25 are obvious over Chevallier in view of the knowledge of a POSITA, arguing that any minor gaps in Chevallier's disclosure would have been obvious design choices.

4. Key Claim Construction Positions

  • "a data register": Petitioner proposed this term be construed as "a portion of memory containing information about a memory card." This broad construction was important for arguing that the "control register" in Chevallier and the CSD register in Toombs meet the claim limitation.
  • "redefine the command to allow permanent write protection": Petitioner proposed this phrase means to "cause a command that would not result in permanent write protection to result in permanent write protection." This construction was central to its argument that setting Chevallier's "secure function bit" meets this limitation by changing the operational outcome of a single, existing command.
  • "an additional data register" (Claim 16): Petitioner proposed this term means "a portion of memory, distinct from the memory portion containing the bit indicating permanent write protection, containing information about the memory card." This was used to argue that other fields within Toombs's CSD register, or other registers entirely, satisfy the limitation.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-7, 12-19, and 25 of the ’370 patent as unpatentable.