PTAB
IPR2017-01116
SanDisk LLC v. Memory Technologies LLC
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2017-01116
- Patent #: RE45,486
- Filed: March 20, 2017
- Petitioner(s): SanDisk LLC
- Patent Owner(s): Memory Technologies
- Challenged Claims: 6, 8-11, 22, 23, and 25-27
2. Patent Overview
- Title: Method for Addressing Memory Locations of a Memory Card
- Brief Description: The ’486 patent discloses methods for increasing the addressable capacity of memory cards, such as MultiMediaCards (MMCs), beyond the limits imposed by existing standards. The technology involves storing parameters and using selectable addressing methods to enable access to larger memory spaces than would otherwise be possible.
3. Grounds for Unpatentability
Ground 1: Anticipation - Claims 6, 8-11, 22, and 25-27 are anticipated by Toombs
- Prior Art Relied Upon: Toombs (Patent 6,279,114).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Toombs, which describes an MMC system, discloses every limitation of the challenged claims. Toombs teaches a Card-Specific Data (CSD) register that stores parameters for calculating card capacity. Crucially, Petitioner asserted that single-bit fields within the CSD register, such as
READ_BL_PARTIALandWRITE_BL_PARTIAL, constitute the claimed "addressing data." These bits indicate whether the card supports a "basic" addressing method (permitting partial block reads/writes of variable sizes) or an "expanded" addressing method (requiring fixed, full-block transfers). Petitioner contended that the expanded method (e.g., addressing a 512-byte block) enables addressing a larger number of memory locations than the basic method (e.g., addressing a single-byte location), thereby meeting the key claim requirement.
- Prior Art Mapping: Petitioner argued that Toombs, which describes an MMC system, discloses every limitation of the challenged claims. Toombs teaches a Card-Specific Data (CSD) register that stores parameters for calculating card capacity. Crucially, Petitioner asserted that single-bit fields within the CSD register, such as
Ground 2: Obviousness over Toombs in view of Dent - Claims 6, 8-11, 22, 23, and 25-27 are obvious over Toombs in view of Dent
- Prior Art Relied Upon: Toombs (Patent 6,279,114) and Dent (Patent 6,314,504).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that to the extent Toombs does not explicitly teach using stored data to select between a basic and a higher-capacity expanded addressing method, Dent supplies this teaching. Dent describes a processor architecture that uses "mode bits" stored in an index register to switch between a "basic" byte-addressing mode (using 31 bits to address up to 2GB) and an "expanded" word-addressing mode that enables addressing a larger memory space (up to 4GB).
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine the analogous teachings of Toombs and Dent. Both references address techniques for accessing digital memory in portable devices and recognize the need for efficiency and expanded capacity. A POSITA would have been motivated to apply Dent's well-known technique of using register bits to select addressing modes to the MMC system in Toombs to solve the known problem of limited address space.
- Expectation of Success: A POSITA would have had a reasonable expectation of success in this combination, as it involved applying a known technique for expanding addressability to a standard memory card system to achieve the predictable result of increased capacity.
Ground 3: Obviousness over Toombs in view of the PCMCIA Standard - Claims 6, 8-11, 22, 23, and 25-27 are obvious over Toombs in view of the PCMCIA Standard
Prior Art Relied Upon: Toombs (Patent 6,279,114) and The PC Card Standard ("PCMCIA").
Core Argument for this Ground:
- Prior Art Mapping: The PCMCIA standard, a leading mass storage standard, provides an alternative teaching for the claimed invention. PCMCIA describes a "basic" addressing method for smaller capacities (64MB) and an "expanded" method that uses address extension bits to access larger capacities (up to 4GB). The standard specifies that a "tuple" of data is stored in the card's Card Information Structure (CIS) to indicate to the host system which addressing method is supported.
- Motivation to Combine: A POSITA attempting to overcome the capacity limitations of the MMC card described in Toombs would have looked to how other prevalent standards, such as PCMCIA, solved the identical problem. It would have been obvious to incorporate PCMCIA's solution—storing an indicator (the tuple) to signal support for an expanded addressing mode—into the Toombs system. The CIS in PCMCIA and the CSD register in Toombs perform analogous functions of storing card configuration data for the host.
Additional Grounds: Petitioner asserted an additional obviousness challenge based on Toombs in view of Revision 3a of the ATA-6 Standard. This ground relied on a similar theory, arguing a POSITA would have been motivated to apply the ATA-6 standard's method of using a stored bit in the device identification data to indicate support for an expanded (48-bit) addressing mode over the basic (28-bit) mode.
4. Key Claim Construction Positions
- "addressing data": Petitioner proposed this term should be construed as "data indicative of an addressing method." This construction was central to its argument, allowing single-bit flags in the prior art (like
READ_BL_PARTIALin Toombs) to meet the claim limitation. - "an addressing method": Petitioner proposed the construction "a technique of accessing data by way of its location." Petitioner argued this interpretation was consistent with the specification and prosecution history, where the patentee distinguished between a "basic addressing method" and an "expanded addressing method," which formed the core of the invalidity arguments.
5. Relief Requested
- Petitioner requests the institution of an inter partes review and the cancellation of claims 6, 8-11, 22, 23, and 25-27 of Patent RE45,486 as unpatentable.
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