PTAB

IPR2017-01341

Cisco Systems Inc v. Egenera Inc

Key Events
Petition
petition Intelligence

1. Case Identification

2. Patent Overview

  • Title: Reconfigurable, Virtual Processing System, Cluster, Network and Method
  • Brief Description: The ’430 patent relates to processing systems that use virtualized communication networks and storage for rapid deployment and reconfiguration. The technology describes a hardware platform comprising a large pool of processors from which a subset can be selected and configured via software commands to form a virtualized network of computers, including virtualization of local area networks (LANs) and I/O storage.

3. Grounds for Unpatentability

Ground 1: Obviousness over Aziz and Grosner - Claims 3, 4, 7, and 8 are obvious over Aziz in view of Grosner.

  • Prior Art Relied Upon: Aziz (Patent 6,597,956) and Grosner (Patent 7,089,293).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Aziz taught a platform for creating Virtual Server Farms (VSFs) from a computing grid, but implemented this system using physically separate components: VLAN switches for networking, SAN switches for storage, and a distinct control plane for management. Petitioner asserted this distributed architecture corresponded to the claimed elements. Grosner, in contrast, taught an integrated, multi-protocol "Pirus box" that combined switching for both network (VLAN) and storage (SCSI, Fibre Channel) traffic with embedded controllers for management. Petitioner contended that a POSITA would combine these references by replacing Aziz's separate switches and control plane with Grosner's single, integrated Pirus box. This combined device would function as the "control node" recited in the claims, as it would be in communication with external networks (Internet) and storage networks (SAN), receive messages from processors, modify them (e.g., protocol conversion from SCSI/IP to FC/SCSI), and programmatically configure the virtual network based on software commands, as taught by Aziz's control plane.
    • Motivation to Combine: Petitioner asserted multiple motivations for this combination. The primary driver stemmed from Aziz itself, which suggested constructing SANs over IP networks and mapping SAN zones to different VLANs, thereby explicitly teaching the convergence of network and storage functions. A POSITA implementing this would naturally seek an integrated hardware solution like that disclosed in Grosner. Further motivation arose from the desire to solve the inherent problems of Aziz's complex architecture. Petitioner argued that the numerous discrete components and interfaces in Aziz increased cost, complexity, and potential points of failure. Grosner’s integrated approach would substantially reduce hardware components, simplify the network, and improve reliability—all strong engineering and commercial motivators. Petitioner also noted that Grosner itself recognized an ongoing market trend of storage and IP networks "converging to a single network based on IP," confirming the combination was obvious to those in the field.
    • Expectation of Success: Petitioner argued that a POSITA would have had a high expectation of success because the combination was merely a rearrangement of known, existing functions into a single, more efficient device. This integration represented a predictable consolidation of prior art elements according to known methods to yield predictable results.

Ground 2: Obviousness over Aziz, Grosner, and Katzri - Claims 1, 2, 5, and 6 are obvious over Aziz in view of Grosner and further in view of Katzri.

  • Prior Art Relied Upon: Aziz (Patent 6,597,956), Grosner (Patent 7,089,293), and Katzri (Patent 6,639,901).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground, targeting claims requiring network emulation and specific switch fabrics, built upon the Aziz/Grosner combination. It added Katzri to supply the "network emulation logic to emulate Ethernet functionality" recited in independent claim 1. Petitioner argued that Aziz explicitly disclosed using the ATM LAN Emulation (LANE) standard to extend its local virtual networks across a wide area network (WAN), connecting VSFs in different cities. While Aziz identified this goal, Katzri allegedly provided the necessary implementation details. Katzri described a complete LANE architecture, including LAN Emulation Clients (LECs) and a LAN Emulation Server (LES). Petitioner mapped this by arguing a POSITA would incorporate LEC functionality into Aziz's computing elements and integrate the LES control functionality into the multi-protocol control node provided by Grosner's Pirus box. For dependent claims 2 and 6, Petitioner argued Grosner's Pirus box explicitly taught an internal "high-speed switching fabric and point to point serial interconnect," which met the "point-to-point switch fabric" limitation.
    • Motivation to Combine: The principal motivation was to implement the inter-city WAN connectivity expressly described as a benefit in Aziz. A POSITA tasked with building the system suggested by Aziz would have been motivated to consult prior art like Katzri for the well-known architectural details of ATM LANE. Petitioner further argued that incorporating LANE functionality was a logical and minor extension for Grosner's Pirus box, which was already designed for "Protocol Mediation" between different network types (e.g., Ethernet and Fibre Channel). Adding another protocol emulation was within its intended purpose and would have been an obvious modification to achieve the benefits described in Aziz.
    • Expectation of Success: The combination involved applying a known networking standard (LANE, from Katzri) to a known system (the virtualized server farm from Aziz/Grosner) to achieve the predictable result of emulating Ethernet functionality over a WAN backbone, as desired by Aziz.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-8 of the ’430 patent as unpatentable.