PTAB

IPR2017-01413

Samsung Electronics Co Ltd v. ProMOS Technologies Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Circuit and Method for Reducing Delay Line Length in Delay-Locked Loops
  • Brief Description: The ’507 patent relates to delay-locked loops (DLLs) used for clock deskew functionality in integrated circuits. The invention purports to provide a more elegant and cost-effective method for reducing the physical length of the delay line within a DLL.

3. Grounds for Unpatentability

Ground 1: Anticipation by Kim - Claims 10, 11, 13, and 15 are anticipated by Kim under 35 U.S.C. §102(e).

  • Prior Art Relied Upon: Kim (Patent 5,875,219).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Kim, which was not considered during prosecution, discloses every limitation of the challenged claims. Kim describes a digital DLL that reduces the number of required delay elements by performing a phase shift in a first domain (0°-180°) and then performing an inverse phase shift in a second domain (180°-360°) using selective inversion of the output from a single phase delay unit.
      • For independent claim 10, Petitioner asserted that Kim’s DLL is a “method for reducing delay line length” by its stated effect of reducing the number of delay elements by half. Kim’s phase detector (202) determines the phase difference between an input clock (SCLK) and a feedback clock (CCLK). The DLL inherently “maintain[s] the phase difference…within approximately 180°” because for two signals of the same frequency, a phase lag greater than 180° is mathematically equivalent to a phase lead of less than 180°. Kim’s loop, comprising a phase detector, shift register, and phase delay unit, continuously adjusts the clock signal, which satisfies the limitation of adjusting “when the determined phase difference is less than approximately 180°” because that condition is always met.
      • For dependent claim 11, Petitioner argued that Kim’s phase detector inherently possesses a “first resolution,” as any functioning phase detector must be able to distinguish between different phases at some level of resolution to perform its disclosed function.
      • For independent claim 13, Petitioner contended that Kim’s phase detector determines whether the feedback clock “follows within a 180° phase difference behind an input clock signal” by outputting a specific logic level ('0') when the feedback clock (CCLK) lags the input clock (SCLK). The claim’s requirement of “selecting a switch position” is met by Kim’s synchronization multiplexers, which are controlled by the phase detector’s output to select a forward or backward shift direction for the shift register.
      • For dependent claim 15, Petitioner argued that Kim discloses selecting a “second switch position” when the feedback clock does not follow, as Kim’s multiplexers select the alternate shift direction when the phase detector outputs the opposite logic level ('1').

4. Key Claim Construction Positions

  • "within approximately 180°" (Claim 10): Petitioner argued that claim 10 contains a printing error and that the phrase was intended to be "within approximately 180°" instead of just "approximately 180°." This position was based on amendments and the Notice of Allowance from the patent’s prosecution history, where the "within" language was explicitly recited for the claim that issued as claim 10.
  • Preamble of Claim 13: Petitioner argued that the preamble phrase "for reducing delay line length" is a non-limiting statement of intended use. The argument was that the body of claim 13 fully sets forth the invention without this phrase, and the phrase itself does not give life or meaning to the claim limitations.

5. Key Technical Contentions (Beyond Claim Construction)

  • Phase Difference Interpretation: A central technical argument underpinning the anticipation ground for claim 10 was that for any two clock signals of the same frequency and period, the phase difference between them is always inherently "within approximately 180°." Petitioner explained that a phase lag greater than 180° (e.g., 210°) is functionally and mathematically equivalent to a phase lead of less than 180° (e.g., 150°). Therefore, Kim’s DLL, which continuously adjusts phase alignment, necessarily operates under the condition recited in claim 10.

6. Arguments Regarding Discretionary Denial

  • Petitioner argued that the Board should institute review of this petition as well as a concurrently filed petition challenging the same patent. The basis for this request was that the two petitions rely on different prior art references and assert distinct invalidity theories. This petition relies on Kim, which discloses a shift register-based DLL. The other petition allegedly relies on Jefferson (Patent 5,744,991) and Donnelly (Patent 5,945,862), which disclose different configurations, such as an up/down counter instead of a shift register and an exclusive-OR gate instead of a multiplexer for the switching functionality.

7. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 10, 11, 13, and 15 of the ’507 patent as unpatentable.