PTAB

IPR2017-01414

Samsung Electronics Co Ltd v. ProMOS Technologies Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Sense Amplifier for High-Density Integrated Circuit Memory
  • Brief Description: The ’574 patent relates to a sense amplifier for a high-density integrated circuit memory using CMOS technology. The invention describes a specific circuit architecture for sense amplifiers arranged in columns, including local data write driver circuits, local column read amplifiers, and local sense amplifier drive transistors.

3. Grounds for Unpatentability

Ground 1: Claims 1-3 and 30-37 are obvious over Inoue in view of Min and Hamade

  • Prior Art Relied Upon: Inoue (Japanese Patent Publication JPS58-128087), Min (UK Application # G.B. 2246005A), and Hamade (Patent 5,323,349).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that the combination of these three references, all from the field of semiconductor memory, discloses all limitations of the challenged claims. Inoue was asserted to teach the fundamental sense amplifier circuit, including a CMOS flip-flop (latch circuit) with associated drive and write transistors, but in the context of a single bit line pair. Min was asserted to teach a multi-column memory architecture with a plurality of sense amplifiers, each coupled to a respective bit line pair, and the use of common driver signals. Finally, Hamade was asserted to disclose the missing element: a high-speed "drive circuit" (argued to be a local column read amplifier) provided for each bit line pair, which amplifies potentials during a read operation.
    • Motivation to Combine: Petitioner contended that a person of ordinary skill in the art (POSITA) would first combine Inoue and Min to create a practical, multi-column Dynamic Random Access Memory (DRAM). A POSITA would have recognized Inoue's circuit as a building block and would have looked to a reference like Min for guidance on implementing it across multiple columns, a standard practice for creating high-density memory. This combination, however, would lack dedicated high-speed read circuitry. A POSITA would then have been motivated to incorporate the read amplifier circuit from Hamade into each column of the Inoue-Min combination to add this necessary functionality, thereby creating a more complete and commercially viable memory device capable of fast read operations.
    • Expectation of Success: Petitioner argued that a POSITA would have had a reasonable expectation of success in making this combination. The integration involved applying known circuit components (Inoue's latch, Min's array structure, Hamade's read amplifier) according to well-understood principles in the field of semiconductor memory design to achieve the predictable result of a functional, multi-column DRAM with high-speed read capabilities.

4. Key Claim Construction Positions

Petitioner argued for specific constructions of key terms appearing in the independent claims, asserting that the term "local" is a critical limitation disavowed during the prosecution history of related patents.

  • “local data write driver circuit,” “local column read amplifier,” and “local sense amplifier drive transistor(s)”: Petitioner argued that all three terms should be construed to mean that the respective circuit element is "associated with only one latch circuit." This construction was based on the claim language, which links each local element to a corresponding single sense amplifier (which comprises a latch circuit), and the specification's contrasting use of the term "global" to mean "connected to several sense amps." Petitioner asserted that the patentee had clearly and intentionally disavowed a broader scope during prosecution of parent applications by distinguishing "local" (associated with one sense amplifier) from "global" (associated with more than one). This construction was central to the argument that the prior art circuits, which are designed for a single column before being replicated, meet the "local" limitations.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-3 and 30-37 of the ’574 patent as unpatentable.