Cavium Inc v. Alacritech Inc

1. Case Identification

• Case #: IPR No. Unassigned
• Patent #: 7,124,205
• Filed: July 3, 2017
• Petitioner(s): Cavium, Inc.
• Patent Owner(s): Alacritech, Inc.
• Challenged Claims: 3, 9-10, 16, 22, 24-33, 35-36

2. Patent Overview

• Title: Network Interface Device That Fast-Path Processes Solicited Session Layer Read Commands
• Brief Description: The ’205 patent relates to a network interface device (NID) that accelerates data transfers between a host and a network. The technology purports to reduce host CPU load by using the NID to perform "fast-path" processing, bypassing the host's standard protocol stack for recognized data packets, particularly for solicited session layer read commands.

3. Grounds for Unpatentability

Ground 1: Obviousness over Thia and Satran - Claims 3, 9-10, 16, 22, 27-33, and 35-36 are obvious over Thia in view of Satran.

• Prior Art Relied Upon: Thia (a 1995 paper, "A Reduced Operation Protocol Engine (ROPE) for a Multiple-Layer Bypass Architecture"), SatranI (a Feb. 2000 Internet Draft for SCSI/TCP), and SatranII (a July 2000 Internet Draft for iSCSI). The Satran drafts are collectively referred to as "Satran."
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Thia disclosed the core architecture of the challenged claims, including an apparatus (claims 1, 22) and method (claim 8) with a host computer and a separate NID. Thia's NID performs a "bypass test" on incoming data; packets that pass are processed on a "fast-path" on the NID, bypassing the host's network and transport layers, while packets that fail are processed on a "slow-path" by the host's full protocol stack. Petitioner asserted that Satran taught the iSCSI protocol, which includes solicited read commands and operates at the session layer of the OSI model for which Thia's system was designed. The combination of Thia's architecture with Satran's iSCSI protocol allegedly disclosed all limitations of the independent claims. For instance, claim 35, directed to a host bus adapter (HBA), was allegedly taught by Thia’s NID, which the ’205 patent itself equates to an HBA.
  • Motivation to Combine: A POSITA would combine Thia and Satran to implement Thia’s efficient, but abstract, fast-path system with a concrete, real-world communication protocol. Petitioner asserted that since iSCSI was a well-known protocol by 2000, adapting Thia's system to use it would improve its functionality, broaden its market appeal, and leverage the known advantages of iSCSI for connecting to network-attached storage, which reduces host workload.
  • Expectation of Success: Petitioner argued success was predictable because both Thia and Satran were designed for or applicable to the OSI protocol model. Furthermore, Thia was explicitly described as being adaptable for existing systems with only minor modifications, providing an "easy migration path" for protocols like iSCSI.

Ground 2: Obviousness over Thia, Satran, and Carmichael - Claims 24-26 are obvious over Thia in view of Satran and Carmichael.

• Prior Art Relied Upon: Thia and Satran (as defined above), and Carmichael (Patent 5,894,560).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the Thia and Satran combination. Petitioner argued that Carmichael taught improving I/O data transfer efficiency by using DMA with physical region descriptor (PRD) tables and scatter-gather lists. This was mapped to the limitations of claims 24-26, which depend from claim 22 and add the requirement that the iSCSI read request be "accompanied by an indication of where the destination memory is located on the host computer" (claim 24). Carmichael allegedly disclosed passing such an indication, like a scatter-gather list (claim 25), to an I/O controller before the data transfer begins (claim 26).
  • Motivation to Combine: A POSITA would have been motivated to incorporate Carmichael's techniques into the Thia/Satran system to improve the efficiency of its DMA operations. This represented a predictable combination of known techniques to achieve the common and well-understood goal of more efficient data transfer to memory.
  • Expectation of Success: The combination was argued to have a predictable outcome—a fast-path iSCSI system with more efficient DMA transfers—as it involved applying a known data management optimization technique (Carmichael) to a data processing system (Thia/Satran).

4. Key Claim Construction Positions

• Petitioner argued that the means-plus-function term in claim 31, "means... for [1] receiving... a response... and for [2] fast-path processing... the means also being for [3] receiving a subsequent portion... and for [4] slow-path processing...," is indefinite under 35 U.S.C. §112.
• The argument centered on the contention that the ’205 patent's specification failed to disclose a single corresponding structure that performs all four recited functions. Petitioner asserted that the NID performs fast-path processing, while the host computer performs slow-path processing, meaning no single "means" could perform both functions as required by the claim language.

5. Key Technical Contentions (Beyond Claim Construction)

• Petitioner contended that the challenged claims, all of which require or depend on iSCSI limitations, are not entitled to the patent's earliest claimed priority date of 1997.
• Based on the prosecution history, Petitioner asserted that the earliest application providing adequate support for iSCSI was filed on September 29, 2000. This later priority date is critical as it makes the Satran references, both published in 2000, available as prior art against the challenged claims.

6. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 3, 9-10, 16, 22, 24-33, and 35-36 of the ’205 patent as unpatentable.