PTAB

IPR2017-01847

Vizio Inc v. LighTSIde Technologies Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Multi-Format Audio/Video Production System
  • Brief Description: The ’198 patent describes a multi-format audio/video production system (M.A.P.S.) that utilizes general-purpose computer hardware to provide a low-cost alternative to professional editing equipment. The system is designed to convert video from various input formats to different output formats, potentially changing the frame rate and pixel dimensions.

3. Grounds for Unpatentability

Ground I: Claims 1-4 are obvious over Washino in view of Richards.

  • Prior Art Relied Upon: Washino (Patent 5,537,157) and Richards (Patent 5,208,669).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Washino, which was cited during the patent's original prosecution, discloses a nearly identical multi-format video production system. Washino teaches receiving an input video program, converting it to a digital production format using sampling in excess of 18 MHz, and processing it to output versions with desired frame rates and dimensions, thus meeting most limitations of claim 1. However, Petitioner contended that Washino does not explicitly disclose the structure for the means-plus-function limitation of claim 1[C]: a "high-capacity digital video storage means equipped with an asynchronous program recording and reproducing capability to perform a frame-rate conversion." Richards was asserted to supply this missing element by teaching a system with a pair of high-definition digital frame recorders (HDDFRs) that operate in an alternating fashion—one recording while the other plays back—to perform asynchronous, continuous frame-rate conversion. This structure, Petitioner argued, is the same as that disclosed in the ’198 patent for performing the claimed function. The dependent claims were also allegedly taught by Washino, which discloses a 24 fps production format (claim 2), pixel interpolation (claim 3), and various high-definition output resolutions (claim 4).
    • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Washino with Richards because Washino expressly identified a need for more sophisticated frame-rate conversion techniques for live broadcasts, a problem directly solved by the asynchronous, dual-storage system in Richards. Both references were in the same field of endeavor (video format conversion), making the combination logical and predictable.
    • Expectation of Success: A POSITA would have a reasonable expectation of success because implementing the well-known asynchronous buffer system from Richards into the general-purpose computer architecture of Washino was a straightforward application of known technologies to achieve a predictable result.

Ground II: Claims 1-3 are obvious over Thorpe.

  • Prior Art Relied Upon: Thorpe ("An HDTV Downconverter for Post-Production," a 1990 journal article).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Thorpe, by itself, renders claims 1-3 obvious. Thorpe described an HDTV downconverter that receives an input video program (1125/60 HDTV), converts it to a digital production format by sampling at a frequency well over 18 MHz (e.g., 38.876 MHz or 77.8 MHz), and processes it for output in another format (525/59.94 NTSC). For the means-plus-function limitation, Petitioner pointed to Thorpe’s disclosure of using a "Buffer Memory for Time Axis Conversion" and a dual-bank "525 Format Frame Memory" to perform asynchronous frame-rate and line-rate conversions. This buffer system, which could be implemented with well-known RAM, was argued to meet the structural requirements of claim 1[C]. Thorpe was also alleged to teach a 24-frame film transfer process (claim 2) and the use of pixel interpolation as a fundamental part of its downconversion process (claim 3).
    • Motivation to Combine (for §103 grounds): This ground relies on a single reference.
    • Expectation of Success (for §103 grounds): This ground relies on a single reference.

Ground III: Claims 1-3 are obvious over Thorpe in view of Richards.

  • Prior Art Relied Upon: Thorpe (a 1990 journal article) and Richards (Patent 5,208,669).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground presented an alternative argument where Thorpe’s real-time frame-rate converter, which uses a "frame buffer" for asynchronous conversion, is combined with Richards. While Thorpe disclosed the function of the frame buffer, Petitioner argued that if the Board found Thorpe’s disclosure of the buffer’s specific structure lacking, Richards provided an explicit, well-known implementation. Richards disclosed a dual-storage (CDDFR) system capable of real-time, continuous asynchronous operation.
    • Motivation to Combine: A POSITA would combine the references because Thorpe identified an ongoing effort to develop a cost-effective frame buffer with sufficient capacity for its system. The disclosure of Richards, which was developed by Sony (like Thorpe's system) and published within the development timeframe predicted by Thorpe, provided a direct and suitable solution for Thorpe’s described need.
    • Expectation of Success: The combination was argued to be simple and predictable, as it involved implementing a known type of asynchronous storage system (from Richards) to serve as the frame buffer explicitly called for in Thorpe’s system design.
  • Additional Grounds: Petitioner asserted additional obviousness challenges against claim 4 based on combinations of Thorpe and Gove (E.P. Publication No. EP 0710016) and Thorpe, Richards, and Gove. These grounds argued a POSITA would have been motivated to modify Thorpe's system to output the specific image dimensions recited in claim 4 (e.g., 1024x576), which were known from Gove's disclosure of wide-PAL and wide-SECAM standards.

4. Key Claim Construction Positions

  • Petitioner argued the term "high capacity digital video storage means equipped with an asynchronous program recording and producing capability to perform a frame-rate conversion" in claim 1 is a means-plus-function limitation under pre-AIA 35 U.S.C. §112, paragraph 6.
  • The claimed function was identified as "to perform a frame-rate conversion."
  • The corresponding structure disclosed in the ’198 patent specification was identified as the embodiment in Figure 4, which includes two storage means (412, 414) used in an alternating fashion, a signal processor (416), and a controller (418) to manage the asynchronous reading from one storage means while writing to the other.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-4 of the ’198 patent as unpatentable.