PTAB

IPR2017-01903

Power Integrations Inc v. Semiconductor Components Industries LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Power Conversion Integrated Circuit and Method for Programming
  • Brief Description: The ’862 patent discloses a power conversion circuit, typically within a monolithic integrated circuit, designed to control switched-mode power supplies. The invention centers on a "state circuit" that receives a state control signal and compares it to two different reference values to selectively control the on/off states of the power supply, primarily to place a pulse-width modulated (PWM) control circuit into a non-operational state to conserve energy.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 21-23, 26, 29, and 33-38 by Mammano

  • Prior Art Relied Upon: Mammano (Robert A. Mammano, "Voltage-Mode Control Revisted – A New High-Frequency Controller Features Efficient Off-Line Performance," a 1993 conference paper).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Mammano disclosed every limitation of the challenged claims. Mammano described the UCC3570, a monolithic integrated control circuit for power supplies that includes a PWM controller and a fault protection circuit. Petitioner asserted this fault protection circuit is the claimed "state circuit." Mammano's circuit received a state control signal at a dedicated pin (VFWD), which was compared against two distinct reference thresholds (an over-voltage level of 4V and an under-voltage level of 1V) using a pair of comparators. The outputs of these comparators were fed to a logic circuit (a four-input OR gate) that generated a "PWM STOP" signal. This signal, when active, prevented the PWM control circuit from switching, thereby setting the power supply to a non-operational off-state, directly corresponding to the core features of independent claim 21.

Ground 2: Obviousness of Claims 24-25, 28, and 30-32 over Mammano alone or in view of the SMP3 Datasheet

  • Prior Art Relied Upon: Mammano (a 1993 conference paper) and SMP3 Datasheet (PWR-SMP3 PWM Power Supply IC datasheet, July 1991).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner contended that Mammano disclosed all elements of these claims except for the integration of the power switching transistor within the same semiconductor package; Mammano’s design used an external transistor. The challenged claims require this transistor to be part of the package. Petitioner argued it would have been obvious to a person of ordinary skill in the art (POSITA) to integrate the external transistor shown in Mammano into the same package as the controller IC.
    • Motivation to Combine: A POSITA would combine Mammano's controller with an integrated power switch to follow the well-established industry trend of reducing component count, minimizing circuit board size, and lowering manufacturing costs. The SMP3 Datasheet was presented as evidence of this trend and the technical feasibility, as it described a commercially available monolithic IC that already combined a similar voltage-mode PWM controller with a high-voltage power MOSFET switch.
    • Expectation of Success: Petitioner asserted a POSITA would have had a high expectation of success. The techniques for manufacturing both monolithic and hybrid (co-packaged) ICs with integrated high-voltage transistors were well-known and widely practiced before the patent's priority date, making the modification straightforward and predictable.

Ground 3: Anticipation of Claims 34-39 by the SMP3 Datasheet

  • Prior Art Relied Upon: SMP3 Datasheet (PWR-SMP3 PWM Power Supply IC datasheet, July 1991).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued the SMP3 Datasheet anticipated the method claims by disclosing an integrated circuit for power supplies featuring an "Undervoltage/Overvoltage Lockout" function. This function constituted the claimed method of controlling an operational state. The SMP3 datasheet described receiving a state control signal at an OV/UV pin, comparing that signal to a first reference ("Input OV Trip-off" at 1.25V) and a second, different reference ("Input UV Trip-off" at 0.34V), and generating a "DISABLE" signal in response. This signal determined the operational state of the power converter (disabled if the signal was above the high reference or below the low reference, and normal operation if between them), thus disclosing every step of independent method claim 34.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 21-26 and 28-39 of Patent RE45,862 as unpatentable.