PTAB

IPR2018-00013

Vizio Inc v. Broadcom Corp

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Video Decoding System Supporting Multiple Standards
  • Brief Description: The ’844 patent relates to systems for decoding digital video data that support multiple video standards. The invention employs a central processor to control the overall decoding process, while one or more configurable hardware accelerators are used to perform selected, computationally intensive decoding tasks.

3. Grounds for Unpatentability

Ground 1: Anticipation over Fandrianto ’459 - Claims 1-14 are anticipated by Fandrianto ’459 under 35 U.S.C. §102.

  • Prior Art Relied Upon: Fandrianto ’459 (Patent 5,982,459).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Fandrianto ’459 discloses every limitation of the challenged claims. Fandrianto ’459 describes a programmable video codec system containing a main supervisory processor (a RISC processor) adapted to control a decoding process. The system also includes multiple hardware accelerators coupled to this processor, such as a separate video processor, a Huffman codec, and an H.221/BCH decoder. Petitioner asserted that these components are hardware accelerators because they are dedicated hardware units that speed up specific functions. Fandrianto ’459 explicitly states these accelerators are configurable to perform decoding functions on digital media streams (combined video and audio bitstreams) according to a plurality of decoding methods and standards, including MPEG, JPEG, and H.261. This disclosure was argued to meet all limitations of independent claim 1. Petitioner further mapped elements of Fandrianto '459 to the dependent claims, arguing it discloses a plurality of accelerators (claims 3, 10), specific accelerator types such as a programmable entropy decoder and an inverse quantizer (claim 11), and a processor adapted to configure the accelerators via registers (claims 8, 14).

Ground 2: Obviousness over Fandrianto ’459 and Fandrianto ’842 - Claims 11-14 are obvious over Fandrianto ’459 in view of Fandrianto ’842 under 35 U.S.C. §103.

  • Prior Art Relied Upon: Fandrianto ’459 (Patent 5,982,459) and Fandrianto ’842 (Patent 6,441,842).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Fandrianto ’459 discloses nearly all elements of claims 11-14, including a programmable entropy decoder, an inverse quantizer, an inverse transform accelerator, and a pixel filter. To the extent Fandrianto ’459 does not explicitly teach a "motion compensator" as required by claim 11, Fandrianto ’842 supplies this element. Fandrianto ’842 discloses a motion compensator within its Motion Estimation Section for performing motion compensation on a data stream.
    • Motivation to Combine: A POSITA would combine these references because they address analogous problems in the same field of video decoding for applications like videoconferencing. Fandrianto ’842 teaches that "motion estimation" (disclosed in '459) and "motion compensation" are related and often used interchangeably. Therefore, a POSITA would have found it obvious to supplement the motion estimation capabilities of the '459 system with the explicit motion compensator taught in '842 to improve decoding performance, a known solution for a known problem.
    • Expectation of Success: A POSITA would have a reasonable expectation of success because integrating a motion compensator was a common and predictable technique for improving video decoding quality. Both the ’844 patent and Fandrianto ’842 show that motion compensation was a standard tool in the art, ensuring its integration would yield predictable results.

Ground 3: Anticipation over Fandrianto ’842 - Claims 1-4, 6-11, and 13-14 are anticipated by Fandrianto ’842 under 35 U.S.C. §102.

  • Prior Art Relied Upon: Fandrianto ’842 (Patent 6,441,842).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner argued Fandrianto ’842 discloses a video decoding system with a main vision processor that controls the decoding process. This processor comprises multiple internal sections—a Control Section, a Motion Estimation Section, and a Discrete Cosine Transform (DCT) Section—that function as a plurality of hardware accelerators. These accelerators are coupled to the main processor and perform various decoding functions (e.g., inverse quantization, inverse DCT) on streaming video data. The system is configurable to perform decoding according to at least two different methods ("intraframe mode" and "predictive mode"), thereby meeting the "plurality of decoding methods" limitation of claim 1. Petitioner also contended that Fandrianto '842 discloses the limitations of the dependent claims, including specific accelerator types like a programmable entropy decoder (arithmetic units), an inverse quantizer (MAC units), a motion compensator (shifter units), and a pixel filter (MAC units), as required by claim 11.

  • Additional Grounds: Petitioner asserted an additional obviousness challenge (Ground 4) that claims 5 and 12 are obvious over Fandrianto ’842 in view of Fandrianto ’459, arguing a POSITA would be motivated to add '459's teachings on assisting a processor with byte-alignment and de-blocking filters to the system of '842.

4. Key Claim Construction Positions

  • Petitioner proposed that the key term "accelerator," as used in claims 1-14, should be construed to mean "a device that speeds up or enhances operation." This construction is central to Petitioner's argument that various dedicated hardware components described in the prior art—such as video processors, Huffman codecs, and internal processing sections—qualify as "hardware accelerators" under the claims.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-14 of the ’844 patent as unpatentable.