PTAB

IPR2018-00100

RPX Corporation v. Parity Networks, LLC

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1. Case Identification

2. Patent Overview

  • Title: System and Method for Routing Digital Data
  • Brief Description: The ’378 patent discloses a network node, such as a router, for managing the processing of data packets. The system identifies packets that require special handling by a central processing unit (CPU) and sorts them into multiple hardware queues based on category or priority. This allows the CPU to process the queued packets according to their assigned priority, improving efficiency and mitigating the effects of high traffic loads or denial-of-service attacks.

3. Grounds for Unpatentability

Ground 1: Obviousness over a Single Reference - Claims 1-4, 6-9, 11-16, 18-19 are obvious over Wilford.

  • Prior Art Relied Upon: Wilford (Patent 6,687,247).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Wilford discloses a router architecture that performs all steps of the challenged claims. Wilford teaches a routing system with linecards, where each linecard has a CPU (control circuits 190) for processing packets requiring special handling. Packets are categorized based on one of eight Class of Service (CoS) levels specified in the packet header. A Memory Controller (MCC) on the linecard, functioning as the claimed Network Access Controller (NAC), receives packets destined for the CPU and places them into one of eight dedicated CoS hardware queues associated with that CPU. The linecard's CPU then processes packets from these queues according to their CoS level, giving preference to higher-priority queues. Wilford explicitly describes using a Modified Deficit Round Robin (MDRR) algorithm that, in a "low-delay mode," guarantees that the highest-priority queue is serviced first, thereby processing packets based on category.
    • Key Aspects: Petitioner contended that Wilford discloses virtually every limitation of the claims challenged in this ground. The challenge was framed under 35 U.S.C. §103 as a formality, asserting that to the extent any minor element was not explicitly disclosed, it would have been an obvious implementation detail for a person of ordinary skill in the art (POSITA) to use Wilford's system in a manner that meets the limitation.

Ground 2: Obviousness over Combined References - Claims 5, 10, and 17 are obvious over Wilford in view of Ayres.

  • Prior Art Relied Upon: Wilford (Patent 6,687,247) and Ayres (Patent 6,738,371).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground addressed dependent claims 5, 10, and 17, which add limitations related to monitoring CPU load and adjusting packet processing accordingly. Petitioner relied on Wilford's disclosure of a priority queuing system as described in Ground 1. To meet the added limitations, Petitioner cited Ayres, which teaches techniques for regulating packet flow in a router by monitoring the operating conditions of the router, including processor utilization. In Ayres, when CPU load exceeds a desired range, a flow manager decreases the packet flow rate from ingress queues to maintain system stability. Conversely, the flow rate is increased when CPU load is low.
    • Motivation to Combine: A POSITA would combine Ayres's CPU load monitoring with Wilford's priority queuing system to achieve the predictable result of enhanced system stability and resource management. Wilford provides a system with multiple priority queues but does not explicitly detail how to manage them under varying CPU load conditions. Ayres provides the solution by teaching that monitoring CPU load and adjusting queue processing rates accordingly is a known method for balancing Quality of Service (QoS) during periods of high traffic. A POSITA would therefore be motivated to apply Ayres's established technique to Wilford's router to ensure that Wilford's CPU does not become overloaded and can effectively deliver differentiated service levels as intended.
    • Expectation of Success: A POSITA would have had a reasonable expectation of success in this combination. The integration involved applying a known control strategy (CPU load monitoring from Ayres) to a known system architecture (the multi-queue router of Wilford). Both references operate in the same field of network packet routing, and the combination would predictably result in a more robust system that can maintain performance and stability under varying loads, which was a well-understood goal in the art.

4. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 1-19 of Patent 6,738,378 as unpatentable.