PTAB
IPR2018-00160
On Semiconductor Corp v. Power Integrations Inc
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2018-00160
- Patent #: 7,239,119
- Filed: November 7, 2017
- Petitioner(s): Semiconductor Components Industries, LLC d/b/a ON Semiconductor
- Patent Owner(s): Power Integrations, Inc.
- Challenged Claims: 26, 27, and 32
2. Patent Overview
- Title: Switched Mode Power Supply Controller
- Brief Description: The ’119 patent relates to switched-mode power supply controllers that accommodate high load events. The disclosed technology purports to handle temporary peak power demands by sensing an increased load and, in response, temporarily increasing the maximum switching frequency of the power supply's switching regulator.
3. Grounds for Unpatentability
Ground 1: Anticipation over Hosoya - Claims 26 and 27 are anticipated by Hosoya under 35 U.S.C. §102.
- Prior Art Relied Upon: Hosoya (Japanese Unexamined Patent Application Publication JPA 2002-354801).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Hosoya disclosed every limitation of claims 26 and 27. Hosoya teaches a switched-mode power supply that increases its operating frequency when a high load is detected to improve efficiency and enable component miniaturization. Petitioner asserted that Hosoya’s current detection circuit, which monitors the current through the primary switching transistor (Q1), meets the limitation of “detecting when a load is greater than a power level threshold.” In response to this detection, Hosoya’s control circuitry increases the charge current of an oscillator capacitor (C13), which in turn increases the switching frequency. Petitioner contended this increase is "temporary" because the frequency decreases once the load falls below the threshold, thus satisfying the core limitations of claim 26. For claim 27, Petitioner argued Hosoya’s use of comparators and a flip-flop to control the on-time of the switch (Q1) constitutes the claimed pulse width modulation.
Ground 2: Obviousness over Hosoya and King - Claim 32 is obvious over Hosoya in view of King under 35 U.S.C. §103.
- Prior Art Relied Upon: Hosoya (Japanese Unexamined Patent Application Publication JPA 2002-354801) and King (Patent 5,694,305).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner asserted that Hosoya teaches the base method of temporarily increasing switching frequency in response to a high load, as recited in claim 26 from which claim 32 depends. King was introduced to teach the additional limitation of claim 32: “limiting a time duration that the switch may be switched at up to the increased maximum switching frequency.” King discloses a time-based protection circuit for switching power supplies that monitors for excessive power delivery and terminates switching if the condition persists for a predetermined time period.
- Motivation to Combine: Petitioner argued a person of ordinary skill in the art (POSITA) would be motivated to combine King’s protection circuitry with Hosoya’s power supply. Hosoya is directed at handling loads with high startup currents, such as motors, which is precisely the type of variable load condition King’s protection circuit is designed to address. A POSITA would combine King’s time-limit protection with Hosoya’s frequency-boosting circuit to prevent damage from sustained overcurrent conditions while still allowing for temporary peak power delivery.
- Expectation of Success: Petitioner contended that since both references operate in the same field of switching power supplies and address complementary problems—peak power delivery and overcurrent protection—a POSITA would have a reasonable expectation of successfully integrating King's timer-based protection into Hosoya's design.
Ground 3: Anticipation over Hirst - Claims 26 and 27 are anticipated by Hirst under 35 U.S.C. §102.
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Hirst independently anticipates claims 26 and 27. Hirst describes a multiple-frequency switching power supply that operates at a lower frequency for light loads and switches to a higher frequency for heavy loads to maintain efficiency. Hirst teaches several methods for detecting an increased load, including monitoring output voltage ripple (via a Ripple Monitor), sensing output current directly, or sensing the duty cycle. When the monitored parameter exceeds a threshold, a switch couples a higher-frequency oscillator to the PWM circuit. Petitioner asserted that because the frequency increase is dependent on the fluctuating load, the increase is "temporary" as construed. For claim 27, Hirst explicitly discloses using a pulse width modulator circuit to drive the switching transistor, thereby meeting the pulse width modulation limitation.
Additional Grounds: Petitioner asserted additional challenges, including an obviousness ground that claim 32 is obvious over Hirst in view of King, and an anticipation ground that claims 26 and 27 are anticipated by Cates (Patent 4,479,174).
4. Key Claim Construction Positions
- "Temporarily increasing a maximum switching frequency": Petitioner proposed this phrase be construed to mean that the maximum switching frequency is increased for a limited, non-permanent period of time. Petitioner argued that this limited duration could be determined either by circuit conditions (e.g., the frequency remains high only as long as the load is high) or by a predetermined time limit (e.g., a timer). This construction was central to the anticipation arguments, as it allowed references like Hosoya and Hirst, where the frequency increase is tied to load conditions, to meet the "temporarily" limitation.
7. Relief Requested
- Petitioner requested institution of an inter partes review (IPR) and cancellation of claims 26, 27, and 32 of the ’119 patent as unpatentable.
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