PTAB

IPR2018-00234

Intel Corp v. Alacritech Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Intelligent Network Interface System and Method for Protocol Processing
  • Brief Description: The ’948 patent describes a system and method for offloading network protocol processing from a host computer to an intelligent network interface card (INIC). The INIC uses a dual-path approach, directing "normal" data packets through a "fast path" that bypasses the host's conventional protocol stack, while routing packets with "exception conditions" through a "slow path" that utilizes the host's stack.

3. Grounds for Unpatentability

Ground 1: Claims 1, 3, 6-8, 17, 19, and 21-22 are obvious over Thia in view of Tanenbaum96 and Stevens2.

  • Prior Art Relied Upon: Thia (“A Reduced Operation Protocol Engine (ROPE) for a Multiple-Layer Bypass Architecture,” 1995), Tanenbaum96 (“Computer Networks, 3rd ed.,” 1996), and Stevens2 (“TCP-IP Illustrated, Vol. 2,” 1995).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that the combination of references teaches all limitations of the challenged claims. Thia disclosed a hardware-based protocol engine (ROPE) on a network interface adapter that implemented a fast-path/slow-path architecture to bypass the host's standard protocol stack for normal data packets in an OSI context. Tanenbaum96, a well-known textbook, taught the concept of "header prediction" for TCP/IP, a fast-path processing technique where incoming packets are checked for a set of conditions (e.g., connection in ESTABLISHED state, not fragmented, no special flags set, in-sequence) to determine if they are "normal" and can bypass the full protocol stack. Stevens2 provided a detailed walkthrough of the widely-used BSD source code implementation of Jacobson's Header Prediction, confirming the specific checks involved. Petitioner asserted that combining Thia's hardware offload architecture with the specific TCP/IP header prediction criteria from Tanenbaum96 and Stevens2 renders the claimed invention obvious. For example, the "checking" limitation of claim 1 is met by implementing the header prediction tests of Tanenbaum96 and Stevens2 within Thia's "receive bypass test" framework. Packets passing the test (no exception conditions) are processed on Thia's ROPE chip (bypassing host processing), while packets failing the test are sent to the host's standard stack, as claimed.
    • Motivation to Combine: Petitioner contended a person of ordinary skill in the art (POSITA) would be motivated to combine the references to improve network performance, a recognized goal in the art. A POSITA seeking to apply Thia’s hardware offload concept to the dominant TCP/IP protocol would naturally have consulted authoritative textbooks like Tanenbaum96 and Stevens2. These references explicitly teach header prediction as a standard, performance-enhancing technique for TCP/IP. Thia itself stated its bypass concept could be used with "any standard protocol" and was a generalization of Jacobson’s Header Prediction algorithm, which is the exact subject of Tanenbaum96 and Stevens2. The motivation was to apply a known software optimization (header prediction) in a specialized hardware architecture (Thia's ROPE) to reduce host CPU load and eliminate data-copying overhead.
    • Expectation of Success: Petitioner argued a POSITA would have a reasonable expectation of success in making the combination. The references all address the same problem of protocol processing overhead using compatible fast-path concepts. Tanenbaum96 and Stevens2 provide the precise, well-understood conditions for a TCP/IP fast path, which could be readily implemented as the "receive bypass test" in Thia's established hardware offload architecture. The combination represented a straightforward application of a known TCP/IP optimization technique to a suitable hardware platform.

4. Key Technical Contentions (Beyond Claim Construction)

  • Public Availability of Stevens2: A central contention of the petition was establishing that the Stevens2 reference is a "printed publication" qualifying as prior art. This was in response to a previous IPR (IPR2017-01395) being denied institution because Petitioner had failed to meet this burden. In this petition, Petitioner provided extensive evidence, arguing Stevens2 was publicly available before the critical date based on its 1995 copyright, expert testimony confirming it was a well-known resource, and a declaration from a Cornell University librarian attesting to its public availability in 1995. Crucially, Petitioner also provided a list of ten other publications that pre-dated the patent's priority date and cited Stevens2, arguing this was compelling evidence of its dissemination and accessibility to the public.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1, 3, 6-8, 17, 19, and 21-22 of the ’948 patent as unpatentable.