STMicroelectronics Inc v. Lone Star Silicon Innovations LLC

1. Case Identification

• Case #: IPR2018-00435
• Patent #: 5,912,188
• Filed: January 15, 2018
• Petitioner(s): STMicroelectronics, Inc.
• Patent Owner(s): Lone Star Silicon Innovations LLC
• Challenged Claims: 1-5, 7-13, 15-23, and 25-29

2. Patent Overview

• Title: Method of Forming a Contact Hole in an Interlevel Dielectric Layer Using Dual Etch Stops
• Brief Description: The ’188 patent discloses a method for fabricating semiconductor devices. The invention is directed to forming a contact hole through a three-layer interlevel dielectric structure using a sequence of three distinct, highly selective etches. The second and third dielectric layers are designed to function as dual etch stops, which allegedly prevents over-etching and damage to the underlying source/drain contact on the silicon substrate.

3. Grounds for Unpatentability

Ground 1: Obviousness over Hashimoto - Claims 1-5, 8-13, 15, and 18-19 are obvious over Hashimoto.

• Prior Art Relied Upon: Hashimoto (Japanese Patent Publication No. JP H9-64297).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Hashimoto discloses all elements of the challenged claims. Hashimoto teaches a manufacturing method for a DRAM device that involves forming a contact hole through a three-layer interlevel dielectric stack (silicon oxide, silicon nitride, silicon oxide). The process uses a three-step etch where the intermediate silicon nitride layer serves as a first etch stop and the bottom silicon oxide layer serves as a second etch stop, thereby disclosing the claimed "dual etch stops" to protect the underlying substrate.
  • Motivation to Combine (for §103 grounds): This ground is based on a single reference. Petitioner asserted that to the extent any minor differences exist, such as the explicit requirement for anisotropic etches (claim 3), it would have been an obvious modification. A Person of Ordinary Skill in the Art (POSITA) would have been motivated to use anisotropic etching—a well-known technique—to achieve the straight sidewalls depicted in Hashimoto's own figures, a known benefit for high-resolution patterning.
  • Expectation of Success: A POSITA would have had a high expectation of success, as Hashimoto discloses the specific gas chemistries (e.g., Ar/CHF₃/O₂) for its reactive ion etching (RIE) process, which were known to produce anisotropic results.

Ground 2: Obviousness over Hashimoto and Sung - Claim 20 is obvious over Hashimoto in view of Sung.

• Prior Art Relied Upon: Hashimoto (JP H9-64297) and Sung (Patent 5,550,078).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground builds on Ground 1, adding Sung to teach the limitation of claim 20: "forming a metal-1 pattern on the first dielectric layer that contacts the conductive plug." Petitioner argued that while Hashimoto teaches the base process of forming the contact hole and implies subsequent metallization to create a functional DRAM, Sung explicitly discloses the final steps. Sung teaches forming a contact hole, filling it with a conductive plug, and then depositing and patterning an aluminum-copper layer to create the "metal-1" interconnect layer.
  • Motivation to Combine: A POSITA would combine these references because both relate to DRAM fabrication and address creating contacts. A POSITA implementing Hashimoto's method would have recognized the need for a metal interconnect layer to complete the device. Sung provides an express teaching of this conventional and necessary step, making it an obvious addition to complete the device taught by Hashimoto.
  • Expectation of Success: A POSITA would have had a high expectation of success in combining the teachings. Forming a metal-1 layer was a standard, routine procedure in DRAM fabrication, and Sung's method was a well-understood technique for completing the device structure disclosed by Hashimoto.

Ground 3: Obviousness over Hashimoto and Kawai - Claims 7, 16-17, 21-23, and 25-27 are obvious over Hashimoto in view of Kawai.

• Prior Art Relied Upon: Hashimoto (JP H9-64297) and Kawai (Japanese Patent Publication No. JPH8-46173).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground challenges claims requiring the first and third dielectric layers to be made of the same material (e.g., claim 21). Petitioner argued that Hashimoto teaches the fundamental three-layer etch process but uses different materials for its top (doped silicate glass) and bottom (non-doped silicate glass) oxide layers. Kawai is introduced to supply the teaching of forming the top and bottom oxide layers from the same material (TEOS, a type of silicon oxide).
  • Motivation to Combine: A POSITA would have been motivated to modify Hashimoto's process with Kawai's teaching to simplify manufacturing. Using the same material for the first and third dielectric layers, as taught by Kawai, allows for the use of identical etch conditions for the first and third etch steps. This would reduce process complexity, cost, and the potential for errors compared to Hashimoto's method, which required different etch conditions for each layer.
  • Expectation of Success: A POSA would have had a reasonable expectation of success. The use of a single material for multiple oxide layers was a known design choice for process simplification, and Kawai demonstrated its successful implementation in a similar three-layer etch-stop structure.

• Additional Grounds: Petitioner asserted an additional obviousness challenge against claims 28 and 29 over Hashimoto in view of both Kawai and Sung, arguing that process steps like planarization via chemical-mechanical polishing (from Sung) and stripping photoresist were obvious modifications to the combined Hashimoto/Kawai process.

4. Key Claim Construction Positions

• Petitioner argued for a specific construction of the term "source/drain contact" as "a contact area used to electrically couple a conductive member (for example, a conductive plug) to the source/drain region."
• This construction was asserted to be critical because it clarifies that the "contact" is not necessarily a separate, distinct structure but can be the surface of the source/drain region itself. This interpretation simplifies mapping the prior art, as both Hashimoto and Kawai show a contact being formed directly to the doped silicon substrate.

5. Arguments Regarding Discretionary Denial

• Petitioner argued against discretionary denial by noting this petition was filed concurrently with a motion for joinder to Micron Technology, Inc. v. Lone Star Silicon Innovations LLC, IPR2017-01560.
• That parallel IPR, which challenged the same patent on the same grounds with nearly identical evidence, had already been instituted by the Board on December 15, 2017. Petitioner contended that joining an existing, instituted proceeding promotes efficiency and avoids inconsistent results, weighing heavily against discretionary denial.

6. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 1-5, 7-13, 15-23, and 25-29 of the ’188 patent as unpatentable.