LG Electronics, Inc. v. Fundamental Innovation Systems International LLC

1. Case Identification

• Case #: IPR2018-00493
• Patent #: 7,834,586
• Filed: January 15, 2018
• Petitioner(s): LG Electronics, Inc., LG Electronics U.S.A., Inc., LG Electronics Mobilecomm U.S.A. Inc., LG Electronics Mobile Research U.S.A. LLC, and LG Electronics Alabama, Inc.
• Patent Owner(s): Fundamental Innovation Systems Int'l, LLC
• Challenged Claims: 8-13

2. Patent Overview

• Title: Multifunctional Charger System and Method
• Brief Description: The ’586 patent describes a USB adapter for providing power to a mobile device. The system uses a non-standard identification signal on the USB data lines (D+ and D-) to indicate that the adapter is not limited by the standard USB power specification, allowing for higher-power charging.

3. Grounds for Unpatentability

Ground 1: Claims 8 and 9 are obvious over Dougherty, DeJaco, and Shiga

• Prior Art Relied Upon: Dougherty (Patent 7,360,004), DeJaco (Patent 6,745,024), and Shiga (Patent 6,625,738).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Dougherty taught a method of charging a laptop's battery via a USB interface on a docking station. This combination met the limitations of claim 8 regarding charging a battery in a mobile device. To meet the "wireless telecommunications network" element, Petitioner combined Dougherty with DeJaco, which taught equipping laptops with wireless modems. The core of the ground relied on replacing Dougherty's complex handshaking protocol with the method taught in Shiga. Shiga taught using a non-standard USB signal (an SE1 state, where both D+ and D- data lines are high) for identification purposes. Petitioner asserted that applying a voltage to the data lines as taught by Shiga (e.g., 3 volts) met the claim 9 limitation of the identification signal comprising a voltage level.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Dougherty and DeJaco to add the known benefit of wireless communication to a portable device. A POSITA would have been motivated to replace Dougherty’s complex and time-consuming handshaking protocol with Shiga's simpler SE1 state signaling. Dougherty itself recognized a desire to reduce the time and complexity of coupling, and Shiga's method provided a direct, simple, and easily distinguishable signal to achieve this.
  • Expectation of Success: A POSITA would have reasonably expected that implementing Shiga's well-understood SE1 signaling in Dougherty's system would predictably reduce latency and complexity without affecting the system's ability to provide power.

Ground 2: Claim 10 is obvious over Dougherty, DeJaco, Shiga, and Casebolt

• Prior Art Relied Upon: Dougherty (Patent 7,360,004), DeJaco (Patent 6,745,024), Shiga (Patent 6,625,738), and Casebolt (Patent 6,625,790).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the combination in Ground 1 to further meet claim 10, which required the identification signal to result from "a resistance between the D+ and D- data lines." Petitioner argued that Casebolt taught the precise hardware implementation for this. Casebolt described using a pair of pull-up resistors to drive both the D+ and D- lines to a high state (the SE1 state) to signal a device type. These resistors connect the data lines to a common voltage node, creating an effective resistance between the D+ and D- lines.
  • Motivation to Combine: A POSITA, seeking to implement the SE1 identification signal from Shiga, would have looked to known methods like that in Casebolt. Casebolt’s resistor-based approach eliminated the need for microprocessor control over the data lines, saving firmware code space, reducing pin count, and providing significant cost savings. These benefits would have motivated a POSITA to use Casebolt's method to generate the SE1 signal in the Dougherty/Shiga system.
  • Expectation of Success: The use of pull-up resistors as taught by Casebolt was a conventional and predictable way to set logic levels on data lines, ensuring a high expectation of success.

Ground 3: Claim 10 is obvious over Kanamori

• Prior Art Relied Upon: Kanamori (Application # 2008/0272741).

• Core Argument for this Ground:

  • Prior Art Mapping: Petitioner argued that Kanamori alone rendered claim 10 obvious. Kanamori disclosed a mobile device (e.g., a cellular phone) with a USB interface for charging its battery. To detect a dedicated, non-USB-standard power source, Kanamori taught coupling the D+ and D- data terminals together "through a resistor." This created an SE1 state (both lines high) which the device's detection circuit would sense. This identification signal, which was explicitly different from standard USB enumeration, indicated that a dedicated charging source was available.
  • Motivation to Combine (N/A): This ground was based on a single reference. Petitioner asserted Kanamori taught all elements of claims 8 and 10, including charging a mobile device with a battery, a USB interface, detecting an identification signal on the D+ and D- lines that is different from USB enumeration, and that signal resulting from a resistance between the data lines.

• Additional Grounds: Petitioner asserted additional obviousness challenges, including:

  • Claims 11-12 over Dougherty, DeJaco, Shiga, and Kalogeropoulos (Patent 6,337,560), which added teachings on varying charge modes to extend battery life.
  • Claim 13 over the combination of Dougherty, DeJaco, Shiga, Kalogeropoulos, and Casebolt.
  • Claim 13 over Kanamori in view of Richard (Application # 2007/0239019), which added teachings on implementing a USB controller with an off-the-shelf microprocessor and memory.

4. Key Claim Construction Positions

• Petitioner argued that the term "USB enumeration" (claim 8) should be construed to mean the specific, host-initiated bus-enumeration procedure defined in the official USB Specification. This construction was central to their argument that the identification signal taught by the prior art (the SE1 state) was "different than USB enumeration," as the SE1 state is explicitly a non-standard signal that does not invoke the multi-step enumeration process.

5. Key Technical Contentions (Beyond Claim Construction)

• Petitioner argued that claims 10 and 13 were not entitled to the ’586 patent’s claimed priority dates (from provisional applications filed in 2001). The contention was that the key limitation of a "resistance" between the D+ and D- data lines was not disclosed in the priority documents and appeared for the first time in the non-provisional application filed in 2010. Therefore, Petitioner asserted the effective filing date for claims 10 and 13 was February 26, 2010, which made Kanamori (2008) and Richard (2007) valid prior art against those claims under §102(b).

6. Arguments Regarding Discretionary Denial

• Petitioner argued that the Board should not exercise its discretion to deny institution under §325(d). The reasoning was that the grounds presented were not the same or substantially the same as those previously presented to the examiner during prosecution. Petitioner emphasized that its challenges relied on new combinations of prior art references and were supported by new expert declaration testimony, none of which the examiner had previously considered.

7. Relief Requested

• Petitioner requested that the Board institute an inter partes review of claims 8-13 of the ’586 patent and cancel those claims as unpatentable.