PTAB

IPR2018-01196

Diodes Inc v. North Plate Semiconductor LLC

Key Events

Petition

petition

Title: TRENCH-GATED MOSFET INCLUDING SCHOTTKY DIODE THEREIN
Brief Description: The ’097 patent relates to a trench-gated Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) that integrates a parallel Schottky diode between the source and drain terminals. The invention purports to offer advantages in reducing device cost by minimizing the semiconductor substrate area occupied by the diode and securing improved avalanche tolerance when a backward voltage is applied.

Prior Art Relied Upon: Blanchard (Application # 2003/0040144).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Blanchard discloses a merged trench MOSFET and Schottky diode structure that teaches every limitation of the challenged claims. Independent claim 1 recites a trench MOSFET with a specific five-layer structure; Petitioner asserted that Blanchard’s Figure 7 explicitly illustrates a gate electrode in a trench, an n-type diffusion layer, a p-type base layer, an n-type epitaxial layer, a metal layer, and a second p-type layer with higher impurity concentration (the p+ regions), all arranged as claimed. For dependent claims 2-5, Petitioner contended that Blanchard teaches the required relative depths. For example, claim 3’s limitation that the metal layer is shallower than the deepest portion of the p-type base layer was allegedly shown in Blanchard’s Figure 7, where p+ regions extend the base layer deeper than the metal layer.

Prior Art Relied Upon: Blanchard (Application # 2003/0040144) and Magri (Application # 2004/0164304).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner presented this ground as an alternative, arguing that if Blanchard’s structure (specifically Figure 5, which does not show p+ regions) is considered the starting point, it would have been obvious to modify it with the teachings of Magri. Magri discloses an integrated power MOSFET with a Schottky contact and explicitly teaches adding a "diffused deep body region, more heavily doped than the first diffused body region" (a p+ layer) in contact with the p-type base layer and metal layer.
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Blanchard with Magri to solve a known problem. Magri explicitly states that its p+ deep body region serves to "increase robustness" and prevent the turn-on of a parasitic transistor created by the source/body/drain junctions. Petitioner argued a POSITA would have recognized this known benefit and applied Magri’s solution to Blanchard’s similar trench MOSFET structure.
- Expectation of Success: The combination involved applying a known solution (adding a p+ layer) to address a predictable problem (parasitic transistor effects) in a conventional device architecture. Therefore, a POSITA would have had a reasonable expectation of success in achieving the desired increase in device robustness.

Prior Art Relied Upon: Werner (Application # 2003/0020134).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner asserted that Werner provides a second, independent prior art reference that anticipates all challenged claims. Werner discloses a trench MOSFET with a gate electrode and an integrated Schottky diode connected in parallel with the drain-source path. Petitioner mapped the limitations of claims 1-5 to Werner’s Figures 10a and 10b, arguing they show the claimed trench gate structure, n-type diffusion layer (zone 30), p-type base layer (zone 20), n-type epitaxial layer (zone 12), a metal layer (source electrode 60) penetrating to the epitaxial layer, and a p-type layer with higher impurity concentration (p+ region 15). The relative depths required by dependent claims 2-5 were also allegedly disclosed, with Figure 10a showing the p+ region 15 extending the base layer deeper than both the metal layer and the gate trenches.
Additional Grounds: Petitioner asserted additional obviousness challenges, including that claim 3 is obvious over Werner in view of Blanchard '039 (Patent 6,724,039) to add guard rings for improved breakdown voltage, and that claims 1-5 are obvious over Werner in view of Magri to enhance device robustness using the same rationale as in Ground 2.

Petitioner argued that the terms in the challenged claims should be interpreted according to their broadest reasonable construction in light of the ’097 patent’s specification, consistent with their plain and ordinary meaning to a POSITA.
It was contended that terms central to the invention, such as "trench MOSFET," "gate electrode," "metal layer," "n-type diffusion layer," and "p-type base layer," were all well-understood in the semiconductor art and required no special construction.
For more specific structural limitations, Petitioner proposed straightforward constructions based on the specification and figures. For instance, "a deepest portion of the p-type base layer" was construed to mean the portion of that layer farthest from the n-type diffusion layer. This plain-meaning approach was critical to Petitioner's argument that the conventional structures described in the prior art inherently met the claim limitations.

Petitioner requests institution of an inter partes review and cancellation of claims 1-5 of Patent 7,564,097 as unpatentable.