Dell Inc v. Alacritech Inc

1. Case Identification

• Case #: IPR2018-01306
• Patent #: 7,124,205
• Filed: July 3, 2018
• Petitioner(s): Dell Inc.
• Patent Owner(s): Alacritech, Inc.
• Challenged Claims: 1, 4-8, 11, and 13

2. Patent Overview

• Title: Network Interface Device that Fast-Path Processes Solicited Session Layer Read Commands
• Brief Description: The ’205 patent relates to a system for accelerating network data transfers. It describes a network interface device that uses a "fast-path" to process certain incoming data packets, bypassing the host computer's conventional, CPU-intensive protocol stack to reduce system load.

3. Grounds for Unpatentability

Ground 1: Claims 1, 4, 5, 8, 11, and 13 are obvious over Thia in view of SMB.

• Prior Art Relied Upon: Thia (“A Reduced Operation Protocol Engine (ROPE) for a Multiple-Layer Bypass Architecture,” 1995) and SMB (“Protocols for X/Open PC Interworking: SMB, Version 2,” 1992).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Thia disclosed the core architecture of the challenged claims. Thia taught a network interface device with a fast-path/slow-path system where a "bypass stack" (on a "ROPE" chip) offloaded protocol processing from the host computer's main protocol stack. This system used a "bypass test" (a form of header prediction) to route incoming packets and employed Direct Memory Access (DMA) to transfer the data portion of fast-pathed packets directly to host memory. Thia was designed for the OSI model, which includes network, transport, and session layers. Petitioner contended that SMB disclosed a well-known session-layer file sharing protocol that included solicited read commands ("SMBread") and was explicitly compatible with the OSI model. The combination, therefore, taught an apparatus where Thia's network interface device received a response to a solicited SMB read command. If the response passed the bypass test, the device would perform fast-path processing, placing the data into host memory without the host's protocol stack performing network or transport layer processing, as required by independent claims 1 and 8.
  • Motivation to Combine: A POSITA would combine Thia and SMB for several reasons. First, it would provide Thia's abstract bypass architecture with a concrete, widely-used, real-world communications protocol. Second, adapting Thia to support a popular protocol like SMB would broaden its market appeal. Third, offloading SMB packet processing to Thia's dedicated hardware would improve the performance and efficiency of SMB communications.
  • Expectation of Success: Petitioner asserted a POSITA would have had a high expectation of success because both references were designed for compatibility with the OSI model. Furthermore, Thia expressly stated its design provided an "easy migration path for existing systems," such as those using the SMB protocol.

Ground 2: Claims 6 and 7 are obvious over Thia in view of SMB and Carmichael.

• Prior Art Relied Upon: Thia (1995 paper), SMB (1992 technical standard), and Carmichael (Patent 5,894,560).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the Thia and SMB combination to address the further limitations of claims 6 and 7 regarding multi-packet data placement. Claim 6 required that data from a first and second packet be placed into the destination memory "in a substantially contiguous manner." Petitioner argued that Carmichael taught improved DMA methods using physical region descriptor (PRD) tables to efficiently transfer "contiguous block[s] of data" to host memory. A POSITA would have applied Carmichael's superior DMA technique to the Thia/SMB system, resulting in the contiguous placement of data from multiple response packets. Claim 7 required the data from a first packet to be placed into memory before the second packet is received. Petitioner contended that Carmichael disclosed this by teaching sequential DMA block transfers, where one block is written to memory before the next is received from an I/O device.
  • Motivation to Combine: A POSITA would combine Carmichael with the Thia/SMB system to improve its performance. The primary motivation was to enhance the efficiency of the DMA data transfers inherent in Thia's architecture. Carmichael was explicitly directed to improving DMA performance at minimal cost by enabling more efficient block data transfers. Incorporating its methods would be a logical and predictable optimization of the Thia/SMB system.
  • Expectation of Success: Petitioner argued the combination would have been predictable. Thia already used DMA, and Carmichael taught a known method for improving DMA. Further, Carmichael and SMB were both disclosed as being compatible with common operating systems like UNIX, making their integration straightforward.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that the Board should not exercise its discretion to deny institution.
• Under §325(d), Petitioner asserted denial was inappropriate because this petition raised grounds identical to those already instituted in a co-pending IPR (IPR2018-00226) and was filed with a motion for joinder.
• Under §314(a), Petitioner argued against denial based on the General Plastic factors. It contended that since it was not the first filer and sought to join as an "understudy" (only becoming active if the lead petitioner drops out), the petition would not be abusive, would not overly burden the Board, and would be an efficient use of resources.

5. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 1, 4-8, 11, and 13 of the ’205 patent as unpatentable.